Clocks and Timers

• Clock Distribution
  • Non-PLL Buffers
    • Differential Ended  (26)
    • Single Ended  (22)
    • Mixed Single and Differential Ended  (3)
  • PLL Buffers
    • 0 Delay PLL
      • Differential Ended  (13)
      • Single Ended  (27)
    • Phase Aligner  (2)
    • Multiplier / Divider  (2)
• Clock Generation  (55)
  • General Purpose Synthesizer with optional SSC  (16)
    • VCXO Input  (10)
    • Non-VCXO Input  (6)
  • Ultra Low Jitter Synthesizer and Jitter Cleaner  (19)
    • Internal VCO Output  (14)
    • External VCXO Output  (4)
  • Motherboard  (5)
  • Oscillator IC  (15)
• Memory Interface Clocks and Registers  (29)
  • SDR  (2)
  • DDR PLL  (5)
  • DDR Register  (1)
  • DDR2 PLL  (5)
  • DDR2 Register  (9)
  • DDR3 Register  (2)
  • RAMBUS/XDR  (5)
• RF Synthesizers  (11)
• Digital Media Systems Clocks
  • Audio/Video IP-TV/IP-STB /Streaming Media  (17)
  • DSP and DaVinci Clocks  (10)
  • Office Automation Clocks  (11)
  • Portable Clocks  (11)
• Real-time Clocks  (24)
• Wireless Base Station Clocks  (19)
  • TRX ADC/DAC Frequency Synthesizers/Jitter Cleaners  (7)
  • Baseband Card  (12)
• Timers  (17)

• Clocks and Timing Selection Guide (Rev. B) (1.87 MB)
• Industrial Solutions Guide (Rev. C) (2.35 MB)

Most Popular Application Notes

• Time-Base Oscillator for Real-Time-Clocks (RTC) ICs
• EMI Prevention in Clock-Distribution Circuits
• Phase-Lock Loop-Based (PLL) Clock Drivers: Benefits Versus Costs

Engineering Resources

• NEW Clocks and Timing Selection Guide Now Available (776 KB .pdf)
• NEW An Introduction to Clock Distribution Circuits
• Clock Distribution Circuit FAQs
• Clocks Selection Chart by Signaling Type (50.7 KB)
• Clock Generators, Jitter Cleaners, and Synthesizers
• More Clocks and Timing Resources

Video Casts

• NEW Clocking a High-Speed ADC
• EMI Reduction

RSS Feeds

  Clocks and Timers Product Updates

  Signal Chain Product Updates

  Clocks and Timers News Releases

• CDC3RL02: Dual-Channel Square/Sine-to-Square Wave Clock Buffer
• CDC3S04: Quad Sine-Wave Clock Buffer with LDO
• CDCLVP1216: Low Jitter, 2-Input Selectable 1:16 Universal-to-LVPECL Buffer
• CDCLVP2108: Low Jitter, Dual 1:8 Universal-to-LVPECL Buffer
• CDCM61004: 1:4 Ultra Low Jitter Crystal-In Clock Generator
• CDCE62002: Four Output Clock Generator/Jitter Cleaner with Integrated Dual VCOs
• CDCE72010: 10 Outputs Low Jitter Clock Synchronizer and Jitter Cleaner

Other Clock and Timer Resources:

• Analog Connection eNewsletter - Subscribe
• Analog Applications Journal
• Clocks and Timers Headlines
• Clock Contributed Articles
• Other Company-Authored Articles in the Media