TI’s PCI Express bridge chip, the XIO2000A, is an industry first. It is designed for seamless migration from the legacy PCI to the PCI Express interface. It bridges an x1 PCI Express bus to a 32-bit, 33/66-MHz PCI bus capable of supporting up to six PCI devices downstream. The XIO2000A fully supports PCI Express rates of 2.5 Gbps. Its architecture supports the PCI 2.3 interface. The chip’s design enables PC and I/O add-on card manufacturers to begin transitioning to native PCI Express technology while preserving compatibility with existing PCI system software and firmware.

Key Features

• Compliant with PCI Express to PCI/PCI-X Bridge Specification Revision 1.0
• Compliant with PCI Express Base Specification 1.0a
• Compliant with PCI Local Bus Specification rev 2.3
• Utilizes 100 MHz differential PCI Express Common Reference Clock or 125 MHz Single-Ended Reference Clock
• Full PCI Local Bus 66 MHz/32-bit Throughput
• Wake/Beacon Event Support
• Robust Architecture to Minimize Latency

Key Benefits

• Built-in adaptive receiver equalizer
• Improves jitter tolerance thereby reliably increasing PCB trace, or cable
length, supported by the XIO2000
• Seven buffered PCI clock outputs (33 MHz or 66 MHz)
• Reduces external components, costs and premium board space
• 32-bit secondary PCI bus with 33-MHz or 66-MHz clocking option
• Customizes to meet the needs of highperformance or low-power applications
• Proven compatibility with various PCI Express chipsets and PCI add-in cards
• Rigorous field testing with major root complex device and numerous PCI add-in cards
• Compact footprint
• Allows placement in ExpressCard and mini-PCI cards in limited board space
• Advanced power management features
• Software programmable and hardware autonomous power management features for low-power applications such as ExpressCard

Target Markets

The XIO2000A meets the needs of multiple market segments, including desktop and mobile PC, server, storage, PC add-in cards and embedded systems.