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TMS320DM6467


Power Requirements | Reference Designs | Resources | Related Links to SBDs


Power Requirements for TMS320DM6467
  Pin Name Voltage (V) Imax (mA) Tolerance Sequencing Order Timing Delay
Vcore CVDD 1.2 5000 ±5% 1 All supplies must be stable within 200ms after power ramp begins.
I/O DVDD33, USB_DVDDA3P3 3.3 500 ±5% 3
I/O DVDDR2, PLL1VDD18, PLL2VDD18, DEV_VDD18, AUX_VDD18, USB_VDDA1P8, 1.8 400 ±5% 2

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Reference Designs for TMS320DM6467
Name File Name/Size Date Download
5V / 12V Input
DM6467 (x1) Power Reference Design using a DCDC controller/converter slvr338.pdf, 135 KB Jun 2008
DM6467 (x2) Power Reference Design using a DCDC controller/converter slvr337.pdf, 159 KB Jun 2008
DM6467 (x1) Power Reference Design using DCDC controllers slvr336.pdf, 1.7 MB Jun 2008
DM6467 (x2) Power Reference Design using DCDC controllers slvr335.pdf, 1.7 MB Apr 2008
Power Reference Design for DM6467 using Modules slvr318.pdf, 71 KB Nov 2007
Enabling SmartReflex on the TMS320DM6467 spraaz2.pdf, 204 KB Sep 2008

Note: Unless otherwise noted, these reference designs are tested to meet the specs given in the above power specification table.

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Complementary Analog

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Resources for TMS320DM6467

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Related System Block Diagrams (SBDs)

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