Power Requirements | Reference Designs | Resources
| Power Requirements for Cyclone III: EP3C series |
| |
Pin Name |
Voltage (V) |
Imax* |
Tolerance |
Sequencing Order |
Timing Delay |
| Device |
(mA) |
| Core |
Vccint |
1.2 |
EP3C5
EP3C10
EP3C16
EP3C25
EP3C40
EP3C55
EP3C80
EP3C120 |
500
800
1000
1500
2500
3500
4500
6000 |
±4% |
1 |
Ramp Time (Vccint, Vccio) : < 100ms |
| I/O |
Vccio |
1.2 / 1.5 / 1.8 / 2.5 / 3.0 / 3.3 |
|
4000 |
±5% |
| PLL |
Vcca |
2.5 |
|
50 |
±4% |
| |
Vccd_pll |
1.2 |
|
50 |
±4% |
|
*Note: The Imax value shown above table is the
maximum value when the desired FPGA is used in the majority of applications.
There may be cases in which the required current is higher or lower
depending on your clock frequencies and your particular usage case.
For your exact current requirements, go to the power estimator spreadsheet
for your FPGA.
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Note: Unless otherwise noted, these reference designs
are tested to meet the specs given in the above power specification
table.
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Resources for Cyclone III: EP3C series
- Cyclone III Device Handbook (cyclone3_handbook.pdf, 8
MB)
Jul 2007 Download
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