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TMS320C6474

Power Requirements | Reference Designs | Resources | Related Links to SBDs

Power Requirements for TMS320C6474
Core, I/O Pin Name Voltage (V) Imax (mA) Tolerance Sequencing Order Timing Delay
Core CVDD 0.9 to 1.2 8,600 ±3% 2 All supplies must be stable within 200ms after power ramp begins.
Core DVDD18, AVDD1_18, AVDD2_18, AIF_VDDR_18, SGR_VDDR_18 1.8 900 ±5% 1
Core AVDD1_18, AVDD2_18, AIF_VDDR_18, SGR_VDDR_18 1.8 180 ±5% 1
Core DVDD_11 (AIF_VDDD_11, AIF_VDDA_11, AIF_VDDT_11, SGR_VDDD_11, SGR_VDDA_11,SGR_VDDT_11) 1.1 1,450 ±5% 2

Note:

  • All 1.8V rails may be combined and all 1.1V rails may be combined; however, follow the filtering recommendations for each voltage rail in the C6474 Hardware Design Guide (spraaw7).
  • Consult the C6474 power spreadsheet for your exact power requirements.
  • DVDD18 voltage rail includes power required for external DDR2 memory.

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Reference Designs for TMS320C6474
Name File Name/Size Date Download
5V and 12 V Input
C6474 (x2) Power using Modules slta058, 108 KB Sep 2008
C6474 (x4) Power using Modules slta057, 132 KB Sep 2008
C6474 Core Power using DCDC Controller with Integrated VID slva316, 640 KB Jan 2009

Note: Unless otherwise noted, these reference designs are tested to meet the specs given in the above power specification table.

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Resources for TMS320C6474

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Related System Block Diagrams (SBDs)

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