Samples & Purchase Cart
|
Contact Us
|
TI Worldwide
: United States
|
my.TI Login
All Searches
TI Home
>
Applications
>
Ultrasound System
> Block Diagrams
Block Diagrams
5 Results -
Use
Parametric Search
to refine these results.
Results Table Legend
Suggested Devices
1 - 5 of 5 Results
Page 1 |
Part Number
Status
Sub Family
Output Level
VCC (V)
Output Frequency (min) (Mhz)
Output Frequency (max) (Mhz)
Divider Ratio
Input Level
Operating Temp Range (Celsius)
Rating
Priority (type 2)
No. of Outputs
No. of 100/133 MHz Outputs
Jitter-Peak to Peak(P-P) or Cycle to Cycle(C-C)
Output Skew (ps)
Multiplier Ratio
IO Supply (Volts)
Operating Frequency Range (min) (MHz)
Operating Frequency Range (max) (MHz)
Absolute Jitter (cycle-to-cycle) (ps)
tsk(o) (ns)
Pin/Package
Approx. Price (US$)
Description
CDCE72010
ACTIVE
TRX ADC/DAC FREQUENCY SYNTHERSIZER/JITTER CLEANERS
LVPECL,LVDS,LVCMOS
3.3
0.001
1500
1 - 80
LVPECL,LVCMOS
-40 to 85
Catalog
1
10
64VQFN
10.95
10 Outputs Low Jitter Clock Synchronizer and Jitter Cleaner
CDCE906
ACTIVE
NON-VCXO INPUT
LVCMOS
3.3
0
167
Universal Ratio
Crystal, LVCMOS, Differential
0 to 70
Catalog
1
6
60ps
150
Universal Ratio
20TSSOP
2.2
Programmable 3-PLL Clock Synthesizer / Multiplier / Divider
CDCE949
ACTIVE
VCXO INPUT
LVCMOS
1.8,3.3
230
Universal Ratio
Crystal, LVCMOS
-40 to 85
Catalog
1
9
60 ps
150
Universal Ratio
2.5 to 3.3
24TSSOP
2.35
Programmable 4-PLL VCXO Clock Synthesizer with 2.5V or 3.3V LVCMOS Outputs
CDCM7005
ACTIVE
EXTERNAL VCXO OUTPUT
LVPECL,LVCMOS
3.3
1500
1,2,3,4,6,8,16
LVCMOS (REF_CLK),LVPECL (VCXO_CLK)
-40 to 85
Catalog
1
5
48VQFN , 64BGA
9.5
High Performance, Low Phase Noise, Low Skew Clock Synchronizer that Synchronizes Ref Clock to VCXO
CDCVF2505
ACTIVE
SINGLE ENDED
LVTTL
3.3
LVTTL
-40 to 85
Catalog
1
5
24
200
150
0.150
8SOIC , 8TSSOP
0.85
PLL Clock Driver for Synch. DRAM & Gen. Purp. Apps W/Spread Spectrum Compatibility, Power Down Mode