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Suggested Devices

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Part Number   Status  
Sub Family  
No. of Outputs   Output Level   Static Current   Frequency (max) (MHz)   Voltage Range   Phase Error   VCC (V)   Operating Temp Range (Celsius)   Tsk(o) (ps)   Pulse Skew   Rating   Priority (type 2)   Input Level   Vcc range (V)   tsk(o) (ns)   tsk(p) (ns)   Output Drive (mA)   Pin/Package   Approx. Price (US$)  
Description  
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CDCL1810 ACTIVE DIFFERENTIAL ENDED(NP) 10 CML 227mA 650 1.7V to 1.9V 3ns 1.8 -40 to 85 +/- 64 +/- 5% (or Duty Cycle 45 to 55%) Catalog 1 LVDS 48VQFN 6.45 1.8V 1-to-10 High Performance Differential Clock Buffer
CDCLVD110A ACTIVE DIFFERENTIAL ENDED(NP) 10 LVDS 1100 2.5 -40 to 85 Catalog 1 LVDS 32LQFP ,  32VQFN 5.9 1-to-10 LVDS Clock Buffer up to 1100MHz with Minimum Skew for Clock Distribution
CDCLVP110 ACTIVE DIFFERENTIAL ENDED(NP) 10 LVPECL 3500 2.5, 3.3 -40 to 85 Catalog 1 HSTL, LVPECL 2.375 - 3.8 32LQFP 5.55 1:10 LVPECL/HSTL to LVPECL Clock Driver
CDCLVP111 ACTIVE DIFFERENTIAL ENDED(NP) 10 LVPECL 3500 2.5, 3.3 -40 to 85 Catalog 1 LVPECL,LVDS,CML,SSTL 2.375 - 3.8 32LQFP ,  32VQFN 5.55 1:10 LVPECL Buffer with Selectable Input
CDCM1804 ACTIVE MIXED SINGLE AND DIFFERENTIAL ENDED 4 LVPECL, 1-LVCMOS No of outputs = 3 LVPECL, LVCMOS 800 3.3 -40 to 85 Catalog 1 LVPECL, LVDS, HSTL, CML, VML, SSTL-2 3-3.6 30 150 24VQFN 5.9 1:3 LVPECL Clock Buffer & Addl LVCMOS Output & Programmable Divider
CDCP1803 ACTIVE DIFFERENTIAL ENDED(NP) 3 LVPECL 800 3.3 -40 to 85 Catalog 1 LVPECL, LVDS, LVTTL, HSTL, VML, CML, SSTL-2 3 - 3.6 30 150 24VQFN 3.15 1:3 LVPECL Clock Buffer with Programable Divider
CDCV304 ACTIVE SINGLE ENDED(NP) 4 LVTTL 200 2.5, 3.3 -40 to 85 Catalog 1 LVTTL 2.5 - 3.6 -24,24 8TSSOP 1.1 General Purpose and PCI-X 1:4 Clock Buffer