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Suggested Devices
1 - 4 of 4 Results
Page 1 |
Part Number
Status
Sub Family
Output Level
VCC (V)
Output Frequency (min) (Mhz)
Output Frequency (max) (Mhz)
Jitter-Peak to Peak(P-P) or Cycle to Cycle(C-C)
Output Skew (ps)
Divider Ratio
Multiplier Ratio
No. of 100/133 MHz Outputs
Operating Temp Range (Celsius)
Rating
Priority (type 2)
Input Level
Frequency (max) (MHz)
No. of Outputs
Static Current
Voltage Range
Phase Error
Tsk(o) (ps)
Pulse Skew
Operating Frequency Range (min) (MHz)
Operating Frequency Range (max) (MHz)
Supply Current (mA)
RMS Jitter
Pin/Package
Approx. Price (US$)
Description
CDCE906
ACTIVE
NON-VCXO INPUT
LVCMOS
3.3
0
167
60ps
150
Universal Ratio
Universal Ratio
6
0 to 70
Catalog
1
Crystal, LVCMOS, Differential
20TSSOP
2.2
Programmable 3-PLL Clock Synthesizer / Multiplier / Divider
CDCL1810
ACTIVE
DIFFERENTIAL ENDED(NP)
CML
1.8
-40 to 85
Catalog
1
LVDS
650
10
227mA
1.7V to 1.9V
3ns
+/- 64
+/- 5% (or Duty Cycle 45 to 55%)
48VQFN
6.45
1.8V 1-to-10 High Performance Differential Clock Buffer
CDCL6010
ACTIVE
INTERNAL VCO OUTPUT
CML
1.8
15
1250
+/- 64ps
1, 2, 4, 5, 8, 10, 16, 20, 32, 40, 80
-40 to 85
Catalog
1
LVDS
10
1.7V to 1.9V
150ps
15
1250
355
400fs (1M ~ 20M)
48VQFN
8.05
1.8V 11-Outputs Clock Multiplier, Distributor, Jitter Cleaner and Buffer
CDCM7005
ACTIVE
EXTERNAL VCXO OUTPUT
LVPECL,LVCMOS
3.3
1500
1,2,3,4,6,8,16
-40 to 85
Catalog
1
LVCMOS (REF_CLK),LVPECL (VCXO_CLK)
5
48VQFN , 64BGA
9.5
High Performance, Low Phase Noise, Low Skew Clock Synchronizer that Synchronizes Ref Clock to VCXO