Flip-Flops, Latches and Registers - D-Type Flip-Flops - CD74ACT74

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Datasheet

CD54ACT74, CD74ACT74 (PDF 516 KB)
05 Dec 2002

	CD54ACT74	CD74ACT74
Voltage Nodes(V)	5	5
Vcc range(V)		4.5 to 5.5
Input Level		TTL
Output Level		CMOS
No. of Bits		2
No. of Outputs		4
Technology Family	ACT	ACT
Rating	Military	Catalog
	Samples	Samples
	Inventory	Inventory

Other qualified versions of CD74ACT74

Version	Part Number	Definition
Automotive	CD74ACT74-Q1	Q100 devices qualified for high-reliability automotive applications targeting zero defects
Military	CD54ACT74	QML certified for Military and Defense Applications

Customers Who Evaluated This Product Also Evaluated

SN74LVC4245A: Octal Bus Transceiver And 3.3-V To 5-V Shifter With 3-State Outputs

Product Information

Features

Inputs Are TTL-Voltage Compatible
Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption
Balanced Propagation Delays
±24-mA Output Drive Current
- Fanout to 15 F Devices
SCR-Latchup-Resistant CMOS Process and Circuit Design
Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015

Description

The ’ACT74 dual positive-edge-triggered devices are D-type flip-flops.

A low level at the preset (PRE)\ or clear (CLR)\ inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE\ and CLR\ are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.

Pricing / Packaging / CAD Design Tools / Samples

			Price	Packaging			CAD Design Tools	Samples
Device	Status	Temp (^oC)	Price \| Quantity	Package \| Pins	Top Side Marking	Package QTY \| Package Carrier	Footprints	Samples
CD74ACT74E	ACTIVE	-55 to 125	0.33 \| 1ku	PDIP (N) \| 14	View	25 \| TUBE	Purchase Samples
CD74ACT74EE4	ACTIVE	-55 to 125	0.33 \| 1ku	PDIP (N) \| 14	View	25 \| TUBE	Purchase Samples
CD74ACT74M	ACTIVE	-55 to 125	0.31 \| 1ku	SOIC (D) \| 14	View	50 \| TUBE	Purchase Samples
CD74ACT74M96	ACTIVE	-55 to 125	0.31 \| 1ku	SOIC (D) \| 14	View	2500 \| LARGE T&R	Contact TI Distributor or Sales Office
CD74ACT74M96E4	ACTIVE	-55 to 125	0.31 \| 1ku	SOIC (D) \| 14	View	2500 \| LARGE T&R	Contact TI Distributor or Sales Office
CD74ACT74M96G4	ACTIVE	-55 to 125	0.31 \| 1ku	SOIC (D) \| 14	View	2500 \| LARGE T&R	Contact TI Distributor or Sales Office
CD74ACT74ME4	ACTIVE	-55 to 125	0.31 \| 1ku	SOIC (D) \| 14	View	50 \| TUBE	Purchase Samples
CD74ACT74MG4	ACTIVE	-55 to 125	0.31 \| 1ku	SOIC (D) \| 14	View	50 \| TUBE	Purchase Samples

* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.

Inventory

Reported Distributor Inventory as of 11:59 AM GMT, 08 Nov 2009
Region	Company	In Stock	Purchase
TI Lead Time*: 18 WeeksCD74ACT74E
Americas	Arrow	350
	Avnet	106
	Rochester Electronics	>1k
Asia	Farnell Asia	749
Europe	Avnet-SILICA	>1k
	EBV Elektronik	400
	Farnell	740
Worldwide	Mouser Electronics	365
TI Lead Time*: 18 WeeksCD74ACT74EE4
None Reported View Distributors
TI Lead Time*: 18 WeeksCD74ACT74M
Americas	Arrow	>1k
	Avnet	>1k
	Rochester Electronics	>1k
Asia	Farnell Asia	>1k
Europe	Arrow Southern Europe	750
Europe	Avnet-SILICA	800
Worldwide	DigiKey	366
TI Lead Time*: 18 WeeksCD74ACT74M96
Americas	Avnet	>1k
Europe	EBV Elektronik	>1k
Worldwide	DigiKey	>1k
Worldwide	Mouser Electronics	>1k
TI Lead Time*: 18 WeeksCD74ACT74M96E4
Worldwide	DigiKey	Available
TI Lead Time*: 18 WeeksCD74ACT74M96G4
Worldwide	DigiKey	Available
TI Lead Time*: 18 WeeksCD74ACT74ME4
Americas	Avnet	>1k
Worldwide	DigiKey	Available
TI Lead Time*: 18 WeeksCD74ACT74MG4
Worldwide	DigiKey	Available
View all Distributors

** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.

Quality & Lead (Pb)-Free Data

	Product Content				DPPM / MTBF / FIT Rate
Device	Eco Plan*	Lead / Ball Finish	MSL Rating / Peak Reflow	Details	Details
CD74ACT74E	Pb-Free (RoHS)	CU NIPDAU	N/A for Pkg Type	View	View
CD74ACT74EE4	Pb-Free (RoHS)	CU NIPDAU	N/A for Pkg Type	View	View
CD74ACT74M	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
CD74ACT74M96	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
CD74ACT74M96E4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
CD74ACT74M96G4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
CD74ACT74ME4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
CD74ACT74MG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View

* The planned eco-friendly classification: Pb-Free (RoHS) or Pb-Free (RoHS Exempt) or Green (RoHS & no Sb/Br) - please click on the Product Content Details "View" link in the table above for the latest availability information and additional product content details.

If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.

Technical Documents

Most useful technical documents for CD74ACT74

Datasheet

CD54ACT74, CD74ACT74 (PDF, 516 KB)
05 Dec 2002

Application Notes

TI IBIS File Creation, Validation, and Distribution Processes (HTM, 9 KB) 3849 views
29 Aug 2002 Read Abstract
Shelf-Life Evaluation of Lead-Free Component Finishes (HTM, 8 KB) 26969 views
24 May 2004 Read Abstract
Selecting the Right Level Translation Solution (Rev. A) (HTM, 8 KB) 15418 views
22 Jun 2004 Read Abstract
Designing With Logic (Rev. C) (HTM, 8 KB) 9068 views
01 Jun 1997 Read Abstract
Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (HTM, 8 KB) 2053 views
01 Apr 1996 Read Abstract
Understanding and Interpreting Standard-Logic Data Sheets (Rev. B) (HTM, 8 KB) 21380 views
28 May 2003 Read Abstract
Implications of Slow or Floating CMOS Inputs (Rev. C) (HTM, 8 KB) 7013 views
01 Feb 1998 Read Abstract
CMOS Power Consumption and CPD Calculation (Rev. B) (HTM, 9 KB) 3135 views
01 Jun 1997 Read Abstract

View Application Notes for D-Type Flip-Flops

User Guides

LOGIC Pocket Data Book (Rev. B) (PDF, 6001 KB) 46833 views
16 Jan 2007

Selection Guides

Logic Guide 2009 (Rev. Z) (PDF, 4263 KB) 88618 views
23 Jul 2009

More Literature

Logic Cross-Reference (Rev. A) (PDF, 2938 KB) 15250 views
07 Oct 2003

Customers Who Evaluated This Product Also Evaluated...
Part #	Name	Product Family	Comments
SN74LVC4245A	Octal Bus Transceiver And 3.3-V To 5-V Shifter With 3-State Outputs	VOLTAGE LEVEL TRANSLATION-DUAL SUPPLY TRANSLATORS	TI customers also evaluated this product.

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CD74ACT74 Status: ACTIVE

Dual Positive-Edge-Triggered D-Type Flip-Flops with Set and Reset

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Datasheet

Other qualified versions of CD74ACT74

Customers Who Evaluated This Product Also Evaluated

Product Information

Features

Description

Pricing / Packaging / CAD Design Tools / Samples

Inventory

Quality & Lead (Pb)-Free Data

Technical Documents

Datasheet

Application Notes

User Guides

Selection Guides

More Literature

Support and Community

Customer Tags

Other Support

CD74ACT74 Status: ACTIVE

Dual Positive-Edge-Triggered D-Type Flip-Flops with Set and Reset

Most Popular Links

Datasheet

Other qualified versions of CD74ACT74

Customers Who Evaluated This Product Also Evaluated

Product Information

Features

Description

Pricing / Packaging / CAD Design Tools / Samples

Inventory

Quality & Lead (Pb)-Free Data

Technical Documents

Datasheet

Application Notes

User Guides

Selection Guides

More Literature

Related Products

Support and Community

Customer Tags

Other Support