Decoders/Encoders/Multiplexers - Decoders/Demultiplexers - CD74HCT137

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Datasheet

CD74HC137, CD74HCT137, CD54HC237, CD74HC237, CD74HCT237 (Rev. F) (PDF 669 KB)
13 Oct 2003

	CD74HCT137
Rating	Catalog
Technology Family	HCT
	Samples
	Inventory

Product Information

Features

Select One of Eight Data Outputs
- Active Low for CD74HC137 and CD74HCT137
- Active High for ’HC237 and CD74HCT237
I/O Port or Memory Selector
Two Enable Inputs to Simplify Cascading
Typical Propagation Delay of 13ns at V_CC = 5V, 15pF, T_A = 25°C (CD74HC237)
Fanout (Over Temperature Range)
- Standard Outputs. . . . 10 LSTTL Loads
- Bus Driver Outputs. . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . –55°C to 125°C
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: N_IL = 30%, N_IH = 30%, of V_CC at V_CC = 5V
HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, V_IL = 0.8V (Max), V_IH = 2V (Min)
- CMOS Input Compatibility, I_l 1µA at V_OL, V_OH

Data sheet acquired from Harris Semiconductor

Description

The CD74HC137, CD74HCT137, ’HC237, and CD74HCT237 are high speed silicon gate CMOS decoders well suited to memory address decoding or data routing applications. Both circuits feature low power consumption usually associated with CMOS circuitry, yet have speeds comparable to low power Schottky TTL logic.

Both circuits have three binary select inputs (A0, A1 and A2) that can be latched by an active High Latch Enable (LE) signal to isolate the outputs from select-input changes. A "Low" LE makes the output transparent to the input and the circuit functions as a one-of-eight decoder. Two Output Enable inputs (OE\₁ and OE₀) are provided to simplify cascading and to facilitate demultiplexing. The demultiplexing function is accomplished by using the A₀, A₁, A₂ inputs to select the desired output and using one of the other Output Enable inputs as the data input while holding the other Output Enable input in its active state.

View All Description in Datasheet

Pricing / Packaging / CAD Design Tools / Samples

			Price	Packaging			CAD Design Tools	Samples
Device	Status	Temp (^oC)	Price \| Quantity	Package \| Pins	Top Side Marking	Package QTY \| Package Carrier	Footprints	Samples
CD74HCT137E	ACTIVE	-55 to 125	0.75 \| 1ku	PDIP (N) \| 16	View	25 \| TUBE	Purchase Samples
CD74HCT137EE4	ACTIVE	-55 to 125	0.75 \| 1ku	PDIP (N) \| 16	View	25 \| TUBE	Purchase Samples
CD74HCT137M96	ACTIVE	-55 to 125	0.75 \| 1ku	SOIC (D) \| 16	View	2500 \| LARGE T&R	Purchase Samples
CD74HCT137M96E4	ACTIVE	-55 to 125	0.75 \| 1ku	SOIC (D) \| 16	View	2500 \| LARGE T&R	Purchase Samples
CD74HCT137M96G4	ACTIVE	-55 to 125	0.75 \| 1ku	SOIC (D) \| 16	View	2500 \| LARGE T&R	Purchase Samples
CD74HCT137MT	ACTIVE	-55 to 125	0.68 \| 1ku	SOIC (D) \| 16	View	250 \| SMALL T&R	Purchase Samples
CD74HCT137MTE4	ACTIVE	-55 to 125	0.68 \| 1ku	SOIC (D) \| 16	View	250 \| SMALL T&R	Purchase Samples
CD74HCT137MTG4	ACTIVE	-55 to 125	0.68 \| 1ku	SOIC (D) \| 16	View	250 \| SMALL T&R	Purchase Samples

* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.

Inventory

Reported Distributor Inventory as of 12:03 PM GMT, 22 Nov 2009
Region	Company	In Stock	Purchase
TI Lead Time*: 18 WeeksCD74HCT137E
Americas	Rochester Electronics	>1k
Europe	EBV Elektronik	800
Worldwide	Mouser Electronics	604
TI Lead Time*: 18 WeeksCD74HCT137EE4
None Reported View Distributors
TI Lead Time*: 15 WeeksCD74HCT137M96
Americas	Rochester Electronics	>1k
TI Lead Time*: 15 WeeksCD74HCT137M96E4
None Reported View Distributors
TI Lead Time*: 15 WeeksCD74HCT137M96G4
None Reported View Distributors
TI Lead Time*: 15 WeeksCD74HCT137MT
Americas	Rochester Electronics	>1k
TI Lead Time*: 15 WeeksCD74HCT137MTE4
Europe	Avnet-SILICA	78
TI Lead Time*: 15 WeeksCD74HCT137MTG4
Europe	EBV Elektronik	125
Worldwide	Mouser Electronics	605
View all Distributors

** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.

Quality & Lead (Pb)-Free Data

	Product Content				DPPM / MTBF / FIT Rate
Device	Eco Plan*	Lead / Ball Finish	MSL Rating / Peak Reflow	Details	Details
CD74HCT137E	Pb-Free (RoHS)	CU NIPDAU	N/A for Pkg Type	View	View
CD74HCT137EE4	Pb-Free (RoHS)	CU NIPDAU	N/A for Pkg Type	View	View
CD74HCT137M96	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
CD74HCT137M96E4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
CD74HCT137M96G4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
CD74HCT137MT	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
CD74HCT137MTE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
CD74HCT137MTG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View

* The planned eco-friendly classification: Pb-Free (RoHS) or Pb-Free (RoHS Exempt) or Green (RoHS & no Sb/Br) - please click on the Product Content Details "View" link in the table above for the latest availability information and additional product content details.

If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.

Technical Documents

Most useful technical documents for CD74HCT137

Datasheet

CD74HC137, CD74HCT137, CD54HC237, CD74HC237, CD74HCT237 (Rev. F) (PDF, 669 KB)
13 Oct 2003

Application Notes

TI IBIS File Creation, Validation, and Distribution Processes (HTM, 9 KB) 3902 views
29 Aug 2002 Read Abstract
Shelf-Life Evaluation of Lead-Free Component Finishes (HTM, 8 KB) 27231 views
24 May 2004 Read Abstract
Designing With Logic (Rev. C) (HTM, 8 KB) 9152 views
01 Jun 1997 Read Abstract
SN54/74HCT CMOS Logic Family Applications and Restrictions (HTM, 8 KB) 3809 views
01 May 1996 Read Abstract
Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (HTM, 8 KB) 2078 views
01 Apr 1996 Read Abstract
Understanding and Interpreting Standard-Logic Data Sheets (Rev. B) (HTM, 8 KB) 21673 views
28 May 2003 Read Abstract
Implications of Slow or Floating CMOS Inputs (Rev. C) (HTM, 8 KB) 7099 views
01 Feb 1998 Read Abstract
CMOS Power Consumption and CPD Calculation (Rev. B) (HTM, 9 KB) 3169 views
01 Jun 1997 Read Abstract

View Application Notes for Decoders/Demultiplexers

User Guides

LOGIC Pocket Data Book (Rev. B) (PDF, 6001 KB) 47290 views
16 Jan 2007
Signal Switch Data Book (Rev. A) (PDF, 18396 KB) 9634 views
14 Nov 2003

Selection Guides

Logic Guide 2009 (Rev. Z) (PDF, 4263 KB) 90505 views
23 Jul 2009

More Literature

Logic Cross-Reference (Rev. A) (PDF, 2938 KB) 15408 views
07 Oct 2003

Support and Community

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CD74HCT137 Status: ACTIVE

High Speed CMOS Logic 3-to-8 Line Decoder/Demultiplexer with Address Latches

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