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CDCDLP223 Status: ACTIVE

3.3V Clock Synthesizer for DLP Systems


      
         
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Datasheet

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 CDCDLP223
VCC(V)3.3  
No. of 100/133 MHz Outputs1  
Input LevelCrystal  
Output LevelLVTTL, HCLK  
Pin/Package20TSSOP  
Output Frequency(Min)(Mhz)20  
Output Frequency(Max)(Mhz)400  
Jitter-Peak to Peak(P-P) or Cycle to Cycle(C-C)75 ps  
Multiplier Ratio1, 5, 15  
Operating Temp Range(Celsius)-40 to 85  
 Samples
 Inventory

Customers Who Evaluated This Product Also Evaluated

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  • CDCE706: Programmable 3-PLL Clock Synthesizer / Multiplier / Divider
  • CDCS502: Crystal Oscillator / Clock Generator with optional SSC
  • TVP7000: Triple 8/10-bit, 150/110MSPS Video ADC
  • TLC072: Dual Wide-Bandwidth High-Output-Drive Op Amp
  • CDCD5704: Rambus XDR(TM) Clock Generator

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Product Information

Features

  • High-Performance Clock Synthesizer
  • Uses a 20 MHz Crystal Input to Generate Multiple Output Frequencies
  • Integrated Load Capacitance for 20 MHz Oscillator Reducing System Cost
  • All PLL Loop Filter Components are Integrated
  • Generates the Following Clocks:
    • REF CLK 20 MHz (Buffered)
    • XCG CLK 100 MHz With SSC
    • DMD CLK 200-400 MHz With Selectable SSC
  • Very Low Period Jitter Characteristic:
    • ±100 ps at 20 MHz Output
    • ±75 ps at 100 MHz and 200-400 MHz Outputs
  • Includes Spread-Spectrum Clocking (SSC), With Down Spread for 100 MHz and Center Spread for 200-400 MHz
  • HCLK Differential Outputs for the 100 MHz and the 200-400 MHz Clock
  • Operates From Single 3.3-V Supply
  • Packaged in TSSOP20
  • Characterized for the Industrial Temperature Range -40°C to 85°C
  • ESD Protection Exceeds JESD22
  • 2000-V Human-Body Model (A114-C) - MIL-STD-883, Method 3015
  • TYPICAL APPLICATIONS
    • Central Clock Generator for DLP™ Systems

View All Features in Datasheet

Description

The CDCDLP223 is a PLL-based high performance clock synthesizer that is optimized for use in DLP™ systems. It uses a 20 MHz crystal to generate the fundamental frequency and derives the frequencies for the 100 MHz HCLK and the 300 MHz HCLK output. Further, the CDCDLP223 generates a buffered copy of the 20 MHz Crystal Oscillator Frequency at the 20 MHz output terminal.

The 100 MHz HCLK output provides the reference clock for the XDR Clock Generator (CDCD5704). Spread-spectrum clocking with 0.5% down spread, which reduces Electro Magnetic Interference (EMI), is applied in the default configuration. The spread-spectrum clocking (SSC) is turned on and off via the serial control interface.

The 300 MHz HCLK output provides a 200-400 MHz clock signal for the DMD Control Logic of the DLP™ Control ASIC.

View All Description in Datasheet

    

Pricing / Packaging / CAD Design Tools / Samples

PricePackagingCAD Design ToolsSamples
DeviceStatusTemp (oC)Price | QuantityPackage | PinsTop Side MarkingPackage QTY | Package CarrierSymbolsFootprintsSamples
CDCDLP223PWACTIVE-40 to 853.20 | 1kuTSSOP (PW) | 20 View 70 | TUBE Download CAD Format for this Symbol Download CAD Format for this Footprint
CDCDLP223PWG4ACTIVE-40 to 853.20 | 1kuTSSOP (PW) | 20 View 70 | TUBE Download CAD Format for this Symbol Download CAD Format for this Footprint
CDCDLP223PWRACTIVE-40 to 852.90 | 1kuTSSOP (PW) | 20 View 2000 | LARGE T&R Download CAD Format for this Symbol Download CAD Format for this FootprintPurchase Samples
CDCDLP223PWRG4ACTIVE-40 to 852.90 | 1kuTSSOP (PW) | 20 View 2000 | LARGE T&R Download CAD Format for this Symbol Download CAD Format for this FootprintPurchase Samples

* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.

Inventory

Reported Distributor Inventory as of 12:01 PM GMT, 22 Nov 2009
RegionCompanyIn StockPurchase
TI Lead Time*: 20 WeeksCDCDLP223PW
AsiaWPI 114
WorldwideMouser Electronics 20
TI Lead Time*: 20 WeeksCDCDLP223PWG4
WorldwideMouser Electronics 90
TI Lead Time*: 20 WeeksCDCDLP223PWR
None Reported
View Distributors
TI Lead Time*: 20 WeeksCDCDLP223PWRG4
None Reported
View Distributors
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** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.

Quality & Lead (Pb)-Free Data

 Product ContentDPPM / MTBF / FIT Rate
DeviceEco Plan* Lead / Ball FinishMSL Rating / Peak ReflowDetailsDetails
CDCDLP223PW RoHS Compliant Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIMViewView
CDCDLP223PWG4 RoHS Compliant Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIMViewView
CDCDLP223PWR RoHS Compliant Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIMViewView
CDCDLP223PWRG4 RoHS Compliant Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIMViewView

* The planned eco-friendly classification: Pb-Free (RoHS) or Pb-Free (RoHS Exempt) or Green (RoHS & no Sb/Br) - please click on the Product Content Details "View" link in the table above for the latest availability information and additional product content details.

If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.

Technical Documents

Most useful technical documents for CDCDLP223 Help

Datasheet

Simulation Models

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