CDCVF2505: PLL Clock Driver for Synch. DRAM & Gen. Purp. Apps W/Spread Spectrum Compatibility, Power Down Mode
Product Information
Features
Phase-Locked Loop-Based Multiplier by Four
Input Frequency Range: 2.5 MHz to 45 MHz
Output Frequency Range: 10 MHz to 180 MHz
LVCMOS/LVTT I/O Compatible
Low Jitter (Cycle-Cycle): ±120 ps Over the Range 75 MHz to 180 MHz
Distributes One Clock Input to Two Banks of Four Outputs
Auto Frequency Detection to Disable Device (Power-Down Mode)
Operates From Single 3.3-V Supply
Industrial Temperature Range 40°C to 85°C
25- On-Chip Series Damping Resistors
No External RC Network Required
Spread Spectrum Clock Compatible (SSC)
Available in 16-Pin TSSOP Package
Description
The CDCVF25084 is a high-performance, low-skew, low-jitter, phase-lock loop clock multiplier. It uses a PLL to precisely align, in both frequency and phase, the output clocks to the input clock signal including a multiplication factor of four. The CDCVF25084 operates from a nominal supply voltage of 3.3 V. The device also includes integrated series-damping resistors in the output drivers that make it ideal for driving point-to-point loads.
Two banks of four outputs each provide low-skew, low-jitter copies of CLKIN x four. All outputs operate at the same frequency. Output duty cycles are adjusted to 50%, independent of duty cycle at CLKIN. The device automatically goes into power-down mode when no input signal is applied to CLKIN and the outputs go into a low state.
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Inventory
Reported Distributor Inventory as of 12:04 PM GMT, 24 Nov 2009
** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.
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