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OMAP3530 Status: ACTIVE

Applications Processor


      
         
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See Also

  • OMAP3525 - The device has SIMILAR FUNCTIONALITY but is not functionally equivalent to the compared device. 
  • OMAP3515 - The device has SIMILAR FUNCTIONALITY but is not functionally equivalent to the compared device. 
  • OMAP3503 - The device has SIMILAR FUNCTIONALITY but is not functionally equivalent to the compared device. 

Datasheet

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 OMAP3530
CPU1 64x+,ARM Cortex-A8  
Peak MMACS3440  
RISC Frequency(MHz)720  
Frequency(MHz)520  
On-Chip L1/SRAM112 KB (DSP),32 KB (ARM Cortex-A8)  
RAM64 KB  
On-Chip L2/SRAM96 KB (DSP),256 KB (ARM Cortex-A8)  
ROM16 KB (DSP),32 KB (ARM Cortex-A8)  
EMIF1 32-Bit SDRC,1 16-Bit GPMC  
External Memory Type SupportedLPDDR,NOR Flash,NAND flash,OneNAND,Asynch SRAM  
DMA64-Ch EDMA,32-Bit Channel SDMA  
Video Port (Configurable)1 Dedicated Output,1 Dedicated Input  
Graphics Accelerator1  
MMC/SD3  
McBSP5  
Pin/Package423FCBGA, 515POP-FCBGA  
POP InterfaceYes (CBB)  
I2C3  
McSPI4  
HDQ/1-Wire1  
UART3  
USB2  
Timers12 32-Bit GP,2 32-Bit WD  
Core Supply (Volts)0.8 V to 1.35 V  
IO Supply (Volts)1.8 V,3.0 V (MMC1 Only)  
Operating Temperature Range (°C)0 to 90,-40 to 105  
 Samples
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Product Information

Features

  • Get started today with production-ready, easy-to-use audio and video codecs for digital media processors based on DaVinci™ technology. Also available are various O/S Board Support Packages and software updates. All codecs are available for FREE evaluation. REQUEST FREE SOFTWARE!
  • OMAP3530/25 Applications Processor:
    • OMAP™ 3 Architecture
    • MPU Subsystem
      • Up to 720-MHz ARM Cortex™-A8 Core
      • NEON™ SIMD Coprocessor
    • High Performance Image, Video, Audio (IVA2.2™) Accelerator Subsystem
      • 520-MHz TMS320C64x+™ DSP Core
      • Enhanced Direct Memory Access (EDMA) Controller (128 Independent Channels)
      • Video Hardware Accelerators
    • POWERVR SGX™ Graphics Accelerator (OMAP3530 Device Only)
      • Tile Based Architecture delivering 10 MPoly/sec
      • Universal Scalable Shader Engine: Multi-threaded Engine Incorporating Pixel and Vertex Shader Functionality
      • Industry Standard API Support: OpenGLES 1.1 and 2.0, OpenVG1.0
      • Fine Grained Task Switching, Load Balancing, and Power Management
      • Programmable High Quality Image Anti-Aliasing
    • Fully Software-Compatible With C64x and ARM9™
    • Commercial and Extended Temperature Grades
  • Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x+™ DSP Core
    • Eight Highly Independent Functional Units
      • +Six ALUs (32-/40-Bit), Each Supports Single 32-Bit, Dual 16-Bit, or Quad 8-Bit Arithmetic per Clock Cycle
      • Two Multipliers Support Four 16 x 16-Bit Multiplies (32-Bit Results) per Clock Cycle or Eight 8 x 8-Bit Multiplies (16-Bit Results) per Clock Cycle
    • Load-Store Architecture With Non-Aligned Support
    • 64 32-Bit General-Purpose Registers
    • Instruction Packing Reduces Code Size
    • All Instructions Conditional
    • Additional C64x+™ Enhancements
      • Protected Mode Operation
      • Exceptions Support for Error Detection and Program Redirection
      • Hardware Support for Modulo Loop Operation
  • C64x+ L1/L2 Memory Architecture
    • 32K-Byte L1P Program RAM/Cache (Direct Mapped)
    • 80K-Byte L1D Data RAM/Cache (2-Way Set-Associative)
    • 64K-Byte L2 Unified Mapped RAM/Cache (4-Way Set-Associative)
    • 32K-Byte L2 Shared SRAM and 16K-Byte L2 ROM
  • C64x+ Instruction Set Features
    • Byte-Addressable (8-/16-/32-/64-Bit Data)
    • 8-Bit Overflow Protection
    • Bit-Field Extract, Set, Clear
    • Normalization, Saturation. Bit-Counting
    • Compact 16-Bit Instructions
    • Additional Instructions to Support Complex Multiplies
  • ARM Cortex™-A8 Core
    • ARMv7 Architecture
      • Trust Zone®
      • Thumb®-2
      • MMU Enhancements
    • In-Order, Dual-Issue, Superscalar Microprocessor Core
    • NEON™ Multimedia Architecture
    • Over 2x Performance of ARMv6 SIMD
    • Supports Both Integer and Floating Point SIMD
    • Jazelle® RCT Execution Environment Architecture
    • Dynamic Branch Prediction with Branch Target Address Cache, Global History Buffer, and 8-Entry Return Stack
    • Embedded Trace Macrocell (ETM) Support for Non-Invasive Debug
  • ARM Cortex™-A8 Memory Architecture:
    • 16K-Byte Instruction Cache (4-Way Set-Associative)
    • 16K-Byte Data Cache (4-Way Set-Associative)
    • 256K-Byte L2 Cache
  • 112K-Byte ROM
  • 64K-Byte Shared SRAM
  • Endianess:
    • ARM Instructions - Little Endian
    • ARM Data — Configurable
    • DSP Instuction/Data - Little Endian
  • External Memory Interfaces:
    • SDRAM Controller (SDRC)
      • 16, 32-bit Memory Controller With 1G-Byte Total Address Space
      • Interfaces to Low-Power Double Data Rate (LPDDR) SDRAM
      • SDRAM Memory Scheduler (SMS) and Rotation Engine
    • General Purpose Memory Controller (GPMC)
      • 16-bit Wide Multiplexed Address/Data Bus
      • Up to 8 Chip Select Pins With 128M-Byte Address Space per Chip Select Pin
      • Glueless Interface to NOR Flash, NAND Flash (With ECC Hamming Code Calculation), SRAM and Pseudo-SRAM
      • Flexible Asynchronous Protocol Control for Interface to Custom Logic (FPGA, CPLD, ASICs, etc.)
      • Nonmultiplexed Address/Data Mode (Limited 2K-Byte Address Space)
  • System Direct Memory Access (sDMA) Controller (32 Logical Channels With Configurable Priority)
  • Camera Image Signal Processing (ISP)
    • CCD and CMOS Imager Interface
    • Memory Data Input
    • RAW Data Interface
    • BT.601/BT.656 Digital YCbCr 4:2:2 (8-/16-Bit) Interface
    • A-Law Compression and Decompression
    • Preview Engine for Real-Time Image Processing
    • Glueless Interface to Common Video Decoders
    • Histogram Module/Auto-Exposure, Auto-White Balance, and Auto-Focus Engine
    • Resize Engine
      • Resize Images From 1/4x to 4x
      • Separate horizontal/Vertical Control
  • Display Subsystem
    • Parallel Digital Output
      • Up to 24-Bit RGB
      • HD Maximum Resolution
      • Supports Up to 2 LCD Panels
      • Support for Remote Frame Buffer Interface (RFBI) LCD Panels
    • 2 10-Bit Digital-to-Analog Converters (DACs) Supporting:
      • Composite NTSC/PAL Video
      • Luma/Chroma Separate Video (S-Video)
    • Rotation 90-, 180-, and 270-degrees
    • Resize Images From 1/4x to 8x
    • Color Space Converter
    • 8-bit Alpha Blending
  • Serial Communication
    • 5 Multichannel Buffered Serial Ports (McBSPs)
      • 512 Byte Transmit/Receive Buffer (McBSP1/3/4/5)
      • 5K-Byte Transmit/Receive Buffer (McBSP2)
      • SIDETONE Core Support (McBSP2 and 3 Only) For Filter, Gain, and Mix Operations
      • Direct Interface to I2S and PCM Device and TDM Buses
      • 128 Channel Transmit/Receive Mode
    • Four Master/Slave Multichannel Serial Port Interface (McSPI) Ports
    • High-Speed/Full-Speed/Low-Speed USB OTG Subsystem (12-/8-Pin ULPI Interface)
    • High-Speed/Full-Speed/Low-Speed Multiport USB Host Controller
      • 12-/8-Pin ULPI Interface or 6-/4-/3-Pin Serial Interface
      • Supports Transceiverless Link Logic (TLL)
    • One HDQ/1-Wire Interface
    • Three UARTs (One with Infrared Data Association [IrDA] and Consumer Infrared [CIR] Modes)
    • Three Master/Slave High-Speed Inter-Integrated Circuit (I2C) Controllers
  • Removable Media Interfaces:
    • Three Multimedia Card (MMC)/ Secure Digital (SD) With Secure Data I/O (SDIO)
  • Comprehensive Power, Reset, and Clock Management
    • SmartReflex™ Technology
    • Dynamic Voltage and Frequency Scaling (DVFS)
  • Test Interfaces
    • IEEE-1149.1 (JTAG) Boundary-Scan Compatible
    • Embedded Trace Macro Interface (ETM)
    • Serial Data Transport Interface (SDTI)
  • 11 32-bit General Purpose Timers
  • 2 32-bit Watchdog Timers
  • 1 32-bit 32-kHz Sync Timer
  • Up to 188 General-Purpose I/O (GPIO) Pins (Multiplexed With Other Device Functions)
  • 65-nm CMOS Technology
  • Package-On-Package (POP) Implementation for Memory Stacking (Not Available in CUS Package)
  • Descreet Memory Interface (Not Available in CBC Package)
  • Packages:
    • 515-pin s-PBGA Package (CBB Suffix), .5mm Ball Pitch (Top), .4mm Ball Pitch (Bottom)
    • 515-pin s-PBGA Package (CBC Suffix), .65mm Ball Pitch (Top), .5mm Ball Pitch (Bottom)
    • 423-pin s-PBGA Package (CUS Suffix), .65mm Ball Pitch
  • 1.8-V I/O and 3.0-V (MMC1 only), 0.975-V to 1.35-V Adaptive Processor Core Voltage, 0.975-V to 1.35-V Adaptive Core Logic Voltage
  • Applications:
    • Portable Navigation Devices
    • Portable Media Player
    • Advanced Portable consumer Electronics
    • Digital TV
    • Digital Video Camera
    • Portable Data Collection
    • Point-of-Sale Devices
    • Gaming
    • Web Tablet
    • Smart White Goods
    • Smart Home Controllers
    • Ultra Mobile Devices

POWERVR SGX is a trademark of Imagination Technologies Ltd.

OMAP is a trademark of Texas Instruments

All trademarks are the property of their respective owners.

Description

OMAP3530 and OMAP3525 high-performance, applications processors are based on the enhanced OMAP™ 3 architecture. The OMAP™ 3 architecture is designed to provide best-in-class video, image, and graphics processing sufficient to support the following:

  • Streaming video
  • 3D mobile gaming
  • Video conferencing
  • High-resolution still image

The device supports high-level operating systems (OSs), such as:

  • Linux
  • Windows CE

This OMAP device includes state-of-the-art power-management techniques required for high-performance mobile products.

The following subsystems are part of the device:

  • Microprocessor unit (MPU) subsystem based on the ARM Cortex™-A8 microprocessor
  • IVA2.2 subsystem with a C64x+ digital signal processor (DSP) core
  • POWER SGX™ subsystem for 3D graphics acceleration to support display and gaming effects (3530 only)
  • Camera image signal processor (ISP) that supports multiple formats and interfacing options connected to a wide variety of image sensors
  • Display subsystem with a wide variety of features for multiple concurrent image manipulation, and a programmable interface supporting a wide variety of displays. The display subsystem also supports NTSC/PAL video out.
  • Level 3 (L3) and level 4 (L4) interconnects that provide high-bandwidth data transfers for multiple initiators to the internal and external memory controllers and to on-chip peripherals

The device also offers:

  • A comprehensive power and clock-management scheme that enables high-performance, low-power operation, and ultralow-power standby features. The device also supports SmartReflex™ adaptative voltage control. This power management technique for automatic control of the operating voltage of a module reduces the active power consumption.
  • Memory stacking feature using the package-on-package (POP) implementation (CBB package only)

OMAP3530/25 devices are available in a 515-pin PBGA package (CBB suffix) and a 423-pin PBGA package (CUS suffix). Some features of the CBB package are not available in the CUS package.

    

Pricing / Packaging / CAD Design Tools / Samples

PricePackagingSamples
DeviceStatusTemp (oC)Price | QuantityPackage | PinsPackage QTY | Package CarrierSamples
OMAP3530DCBBACTIVE0 to 9035.35 | 100uPOP-FCBGA (CBB) | 515 168Purchase Samples
OMAP3530DCBB72ACTIVE0 to 9042.40 | 100uPOP-FCBGA (CBB) | 515 168Purchase Samples
OMAP3530DCBBAACTIVE-40 to 10542.40 | 100uPOP-FCBGA (CBB) | 515 119Purchase Samples
OMAP3530DCBCACTIVE0 to 9035.35 | 100uPOP-FCBGA (CBC) | 515 119Purchase Samples
OMAP3530DCBC72ACTIVE0 to 9042.40 | 100uPOP-FCBGA (CBC) | 515 119Purchase Samples
OMAP3530DCBCAACTIVE-40 to 10542.40 | 100uPOP-FCBGA (CBC) | 515 119Purchase Samples
OMAP3530DCUSACTIVE0 to 9035.35 | 100uFCBGA (CUS) | 423 90Purchase Samples
OMAP3530DCUS72ACTIVE0 to 9042.40 | 100uFCBGA (CUS) | 423 90Purchase Samples
OMAP3530DCUSAACTIVE-40 to 10542.40 | 100uFCBGA (CUS) | 423 90Purchase Samples

* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.

Inventory

Reported Distributor Inventory as of 11:40 AM GMT, 06 Nov 2009
RegionCompanyIn StockPurchase
TI Lead Time*: 12 WeeksOMAP3530DCBB
AmericasArrow 976
EuropeAvnet-SILICA 106
TI Lead Time*: 12 WeeksOMAP3530DCBB72
None Reported
View Distributors
TI Lead Time*: 12 WeeksOMAP3530DCBBA
None Reported
View Distributors
TI Lead Time*: 6 WeeksOMAP3530DCBC
AmericasArrow 119
TI Lead Time*: 12 WeeksOMAP3530DCBC72
None Reported
View Distributors
TI Lead Time*: 12 WeeksOMAP3530DCBCA
AmericasArrow 61
Avnet 48
EuropeEBV Elektronik 10
TI Lead Time*: 12 WeeksOMAP3530DCUS
EuropeArrow Southern Europe 90
TI Lead Time*: 12 WeeksOMAP3530DCUS72
None Reported
View Distributors
TI Lead Time*: 12 WeeksOMAP3530DCUSA
None Reported
View Distributors
View all Distributors  

** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.

Quality & Lead (Pb)-Free Data

 Product ContentDPPM / MTBF / FIT Rate
DeviceEco Plan* Lead / Ball FinishMSL Rating / Peak ReflowDetailsDetails
OMAP3530DCBB RoHS Compliant Green (RoHS & no Sb/Br) Call TI Level-3-260C-168 HRViewView
OMAP3530DCBB72 RoHS Compliant Green (RoHS & no Sb/Br) Call TI Level-3-260C-168 HRViewView
OMAP3530DCBBA RoHS Compliant Green (RoHS & no Sb/Br) Call TI Level-3-260C-168 HRViewView
OMAP3530DCBC RoHS Compliant Green (RoHS & no Sb/Br) Call TI Level-3-260C-168 HRViewView
OMAP3530DCBC72 RoHS Compliant Green (RoHS & no Sb/Br) Call TI Level-3-260C-168 HRViewView
OMAP3530DCBCA RoHS Compliant Green (RoHS & no Sb/Br) Call TI Level-3-260C-168 HRViewView
OMAP3530DCUS RoHS Compliant Green (RoHS & no Sb/Br) Call TI Level-4-260C-72 HRViewView
OMAP3530DCUS72 RoHS Compliant Green (RoHS & no Sb/Br) Call TI Level-4-260C-72 HRViewView
OMAP3530DCUSA RoHS Compliant Green (RoHS & no Sb/Br) Call TI Level-4-260C-72 HRViewView

* The planned eco-friendly classification: Pb-Free (RoHS) or Pb-Free (RoHS Exempt) or Green (RoHS & no Sb/Br) - please click on the Product Content Details "View" link in the table above for the latest availability information and additional product content details.

If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.

Technical Documents TI Recommends - Technical Documentation TI Recommends

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Datasheet

Application Notes

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User Guides

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Selection Guides

White Papers

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Errata

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Tools & Software

NamePart # Company Tool / Software Type
Code Composer Studio Integrated Development Environment (IDE) - v4.xCCSTUDIOTexas InstrumentsCode Composer Studio(TM) IDE
e-CAM32_OMAP35x - Camera Modulee-con Systems India Pvt. Ltd.Daughter Cards
OMAP35x Evaluation Module (EVM)TMDSEVM3530Texas InstrumentsDevelopment Boards/EVMs
Zoom OMAP35x Medical Development KitTMDSMEVM3530-LTexas InstrumentsDevelopment Boards/EVMs
LI-3M02 Camera board for OMAP35x EVMLeopard Imaging IncDevelopment Tools
XDS510 Class EmulatorsXDS510Texas InstrumentsEmulators/Analyzers
Linux Digital Video Software Development Kits (DVSDK) for OMAP35x ProcessorsLINUXDVSDK-OMAPTexas InstrumentsStarter Kits
QNX Neutrino RTOS QNX Software Systems Operating Systems (OS/RTOS) 
Windows CE BSP for OMAP35x ProcessorsDVSDK-WINCEOMAP Texas Instruments Operating Systems (OS/RTOS) 

Simulation Models

View Simulation Models for OMAP35x Processors

Part # Name Product Family Comments
OMAP3525   Applications Processor   OMAP™ Applications Processors - OMAP35x PROCESSORS   The device has SIMILAR FUNCTIONALITY but is not functionally equivalent to the compared device.   
OMAP3515   Applications Processor   OMAP™ Applications Processors - OMAP35x PROCESSORS   The device has SIMILAR FUNCTIONALITY but is not functionally equivalent to the compared device.   
OMAP3503   Applications Processor   OMAP™ Applications Processors - OMAP35x PROCESSORS   The device has SIMILAR FUNCTIONALITY but is not functionally equivalent to the compared device.   
SN65LVDS315   CAMERA PARALLEL RGB TO MIPI CSI-1 SERIAL CONVERTER   DISPLAY INTERFACE - FLATLINK (LVDS FOR LCD)      
SN65LVDS301   Programmable 27-Bit Display Serial Interface Transmitter   DISPLAY INTERFACE - FLATLINK (LVDS FOR LCD)      
TPS62350   1A, 3MHz Buck Converter with I2C for Dynamic Voltage Scaling   DC/DC CONVERTERS (INTEGRATED SWITCH) - STEP-DOWN REGULATORS   Complementary Analog Part    
TPS65023   6-channel Power Mgmt IC with 3DC/DCs, 3 LDOs, I2C Interface and DVS, Optimized for DaVinci DSPs   POWER MANAGEMENT MULTI-CHANNEL IC (PMIC) SOLUTIONS - PMIC SOLUTIONS WITH AND WITHOUT BATTERY CHARGER   Complementary Analog Part    
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TMS320DM6437 Digital Media Processor DAVINCI VIDEO PROCESSORS-TMS320DM643x DSPS TI customers also evaluated this product.

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