SN54LVC573A Status: ACTIVE

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

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Datasheet

SN54LVC573A, SN74LVC573A (Rev. R) (PDF 1149 KB)
30 Jun 2004

	SN54LVC573A	SN74LVC573A	SN74LVC573A-EP
Voltage Nodes(V)	3.3, 2.7, 2.5, 1.8	3.3, 2.7, 2.5, 1.8	3.3, 2.7
Vcc range(V)	2.0 to 3.6	2.0 to 3.6	2.0 to 3.6
Input Level	TTL/CMOS	TTL/CMOS	TTL/CMOS
Output Level	LVTTL	LVTTL	LVTTL
Logic	True	True	True
No. of Bits	8
No. of Outputs	8	8	8
Output Drive(mA)	-24/24	-24/24	-24/24
Static Current	0.01	0.01	0.01
th(ns)	2.5	1.5	2.5
Technology Family	LVC	LVC	LVC
tsu(ns)	2	2	2
tpd max(ns)	6.9	7.5	7.7
Rating	Military	Catalog	HiRel Enhanced Product
	Samples	Samples	Samples
	Inventory	Inventory	Inventory

Other qualified versions of SN54LVC573A

Version	Part Number	Definition
Automotive	SN74LVC573A-Q1	Q100 devices qualified for high-reliability automotive applications targeting zero defects
Catalog	SN74LVC573A	TI's standard catalog product
Enhanced Product	SN74LVC573A-EP	Supports Defense, Aerospace and Medical Applications

Product Information

Features

Operate From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max t_pd of 6.9 ns at 3.3 V
Typical V_OLP (Output Ground Bounce) <0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot) >2 V at V_CC = 3.3 V, T_A = 25°C
Support Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V V_CC)
I_off Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 250 mA Per JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

Description

The SN54LVC573A octal transparent D-type latch is designed for 2.7-V to 3.6-V V_CC operation, and the SN74LVC573A octal transparent D-type latch is designed for 1.65-V to 3.6-V V_CC operation.

These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, input/output (I/O) ports, bidirectional bus drivers, and working registers.

While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels at the D inputs.

A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state.

View All Description in Datasheet

Pricing / Packaging / CAD Design Tools / Samples

				Price	Packaging		CAD Design Tools	Samples
Device	Status	Temp (^oC)	DSCC #	Price \| Quantity	Package \| Pins	Package QTY \| Package Carrier	Footprints	Samples
5962-9757501Q2A	ACTIVE	-55 to 125		15.16 \| 1ku	LCCC (FK) \| 20	1 \| TUBE	Purchase Samples
5962-9757501QRA	ACTIVE	-55 to 125		11.45 \| 1ku	CDIP (J) \| 20	1 \| TUBE	Purchase Samples
5962-9757501QSA	ACTIVE	-55 to 125		14.27 \| 1ku	CFP (W) \| 20	1 \| TUBE		Purchase Samples
SNJ54LVC573AFK	ACTIVE	-55 to 125	5962-9757501Q2A	15.16 \| 1ku	LCCC (FK) \| 20	1 \| TUBE	Contact TI Distributor or Sales Office
SNJ54LVC573AJ	ACTIVE	-55 to 125	5962-9757501QRA	11.45 \| 1ku	CDIP (J) \| 20	1 \| TUBE	Contact TI Distributor or Sales Office
SNJ54LVC573AW	ACTIVE	-55 to 125	5962-9757501QSA	14.27 \| 1ku	CFP (W) \| 20	1 \| TUBE		Contact TI Distributor or Sales Office

* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.

Inventory

Reported Distributor Inventory as of 10:55 AM GMT, 09 Feb 2010
Region	Company	In Stock	Purchase
TI Lead Time*: 6 Weeks5962-9757501Q2A
None Reported View Distributors
TI Lead Time*: 6 Weeks5962-9757501QRA
None Reported View Distributors
TI Lead Time*: 6 Weeks5962-9757501QSA
None Reported View Distributors
TI Lead Time*: 6 WeeksSNJ54LVC573AFK
None Reported View Distributors
TI Lead Time*: 6 WeeksSNJ54LVC573AJ
None Reported View Distributors
TI Lead Time*: 6 WeeksSNJ54LVC573AW
None Reported View Distributors
View all Distributors

** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.

Quality & Lead (Pb)-Free Data

	Product Content				DPPM / MTBF / FIT Rate
Device	Eco Plan*	Lead / Ball Finish	MSL Rating / Peak Reflow	Details	Details
5962-9757501Q2A	TBD	POST-PLATE	N/A for Pkg Type	View	View
5962-9757501QRA	TBD	A42	N/A for Pkg Type	View	View
5962-9757501QSA	TBD	Call TI	N/A for Pkg Type	View	View
SNJ54LVC573AFK	TBD	POST-PLATE	N/A for Pkg Type	View	View
SNJ54LVC573AJ	TBD	A42	N/A for Pkg Type	View	View
SNJ54LVC573AW	TBD	Call TI	N/A for Pkg Type	View	View

* The planned eco-friendly classification: Pb-Free (RoHS) or Pb-Free (RoHS Exempt) or Green (RoHS & no Sb/Br) - please click on the Product Content Details "View" link in the table above for the latest availability information and additional product content details.

If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.

Technical Documents

Most useful technical documents for SN54LVC573A

Datasheet

SN54LVC573A, SN74LVC573A (Rev. R) (PDF, 1149 KB)
30 Jun 2004

Application Notes

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View Application Notes for D-Type Latch

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Support and Community

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SN54LVC573A Status: ACTIVE

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

Most Popular Links

Datasheet

Other qualified versions of SN54LVC573A

Product Information

Features

Description

Pricing / Packaging / CAD Design Tools / Samples

Inventory

Quality & Lead (Pb)-Free Data

Technical Documents

Datasheet

Application Notes

User Guides

Selection Guides

Solution Guides

More Literature

Support and Community

Customer Tags

Other Support