SN74AUC16374 Status: ACTIVE

16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs

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Datasheet

16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs (Rev. E) (PDF 454 KB)
26 Apr 2007

	SN74AUC16374
Voltage Nodes(V)	2.5
Vcc range(V)	0.8 to 2.7
Output Drive(mA)	-9/9
No. of Outputs	16
No. of Bits	16
Static Current	20 uA
th(ns)	0.4
tpd max(ns)	2.2
tsu(ns)	0.6
Logic	True
Technology Family	AUC
Rating	Catalog
	Samples
	Inventory

Customers Who Evaluated This Product Also Evaluated

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SN74AUC74: Dual Positive-Edge-Triggered D-Type Flip-Flops with Clear and Preset

Product Information

Features

Member of the Texas Instruments Widebus™ Family
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
I_off Supports Partial-Power-Down Mode Operation
Sub-1-V Operable
Max t_pd of 2.8 ns at 1.8 V
Low Power Consumption, 20-µA Max I_CC
±8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

Widebus is a trademark of Texas Instruments.

DESCRIPTION/ORDERING INFORMATION

This 16-bit edge-triggered D-type flip-flop is operational at 0.8-V to 2.7-V V_CC, but is designed specifically for 1.65-V to 1.95-V V_CC operation.

The SN74AUC16374 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. It can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CLK) input, the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Pricing / Packaging / CAD Design Tools / Samples

			Price	Packaging			CAD Design Tools	Samples
Device	Status	Temp (^oC)	Price \| Quantity	Package \| Pins	Top Side Marking	Package QTY \| Package Carrier	Footprints	Samples
74AUC16374DGGRE4	ACTIVE	-40 to 85	1.87 \| 1ku	TSSOP (DGG) \| 48	View	2000 \| LARGE T&R
74AUC16374DGGRG4	ACTIVE	-40 to 85	1.87 \| 1ku	TSSOP (DGG) \| 48	View	2000 \| LARGE T&R
74AUC16374DGVRE4	ACTIVE	-40 to 85	1.87 \| 1ku	TVSOP (DGV) \| 48	View	2000 \| LARGE T&R
74AUC16374DGVRG4	ACTIVE	-40 to 85	1.87 \| 1ku	TVSOP (DGV) \| 48	View	2000 \| LARGE T&R
SN74AUC16374DGGR	ACTIVE	-40 to 85	1.87 \| 1ku	TSSOP (DGG) \| 48	View	2000 \| LARGE T&R
SN74AUC16374DGVR	ACTIVE	-40 to 85	1.87 \| 1ku	TVSOP (DGV) \| 48	View	2000 \| LARGE T&R
SN74AUC16374GQLR	NRND	-40 to 85	3.08 \| 1ku	BGA MICROSTAR JUNIOR (GQL) \| 56	View	1000 \| LARGE T&R	Not Available
SN74AUC16374ZQLR	ACTIVE	-40 to 85	2.05 \| 1ku	BGA MICROSTAR JUNIOR (ZQL) \| 56	View	1000 \| LARGE T&R	Purchase Samples

* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.

Inventory

Reported Distributor Inventory as of 11:06 AM GMT, 22 Nov 2009
Region	Company	In Stock	Purchase
TI Lead Time*: 20 Weeks74AUC16374DGGRE4
Worldwide	DigiKey	Available
TI Lead Time*: 20 Weeks74AUC16374DGGRG4
Worldwide	DigiKey	Available
TI Lead Time*: 12 Weeks74AUC16374DGVRE4
Worldwide	DigiKey	Available
TI Lead Time*: 12 Weeks74AUC16374DGVRG4
Worldwide	DigiKey	Available
TI Lead Time*: 20 WeeksSN74AUC16374DGGR
Americas	Arrow	>1k
	Newark	>1k
	Rochester Electronics	>1k
Asia	Farnell Asia	>1k
Worldwide	DigiKey	>1k
Worldwide	Mouser Electronics	>1k
TI Lead Time*: 12 WeeksSN74AUC16374DGVR
Americas	Rochester Electronics	>1k
Worldwide	DigiKey	>1k
TI Lead Time*: 8 WeeksSN74AUC16374ZQLR
None Reported View Distributors
View all Distributors

** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.

Quality & Lead (Pb)-Free Data

	Product Content				DPPM / MTBF / FIT Rate
Device	Eco Plan*	Lead / Ball Finish	MSL Rating / Peak Reflow	Details	Details
74AUC16374DGGRE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
74AUC16374DGGRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
74AUC16374DGVRE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
74AUC16374DGVRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
SN74AUC16374DGGR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
SN74AUC16374DGVR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
SN74AUC16374GQLR	TBD	SNPB	Level-1-240C-UNLIM	View	View
SN74AUC16374ZQLR	Green (RoHS & no Sb/Br)	SNAGCU	Level-1-260C-UNLIM	View	View

* The planned eco-friendly classification: Pb-Free (RoHS) or Pb-Free (RoHS Exempt) or Green (RoHS & no Sb/Br) - please click on the Product Content Details "View" link in the table above for the latest availability information and additional product content details.

If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.

Technical Documents

Most useful technical documents for SN74AUC16374

Datasheet

16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs (Rev. E) (PDF, 454 KB)
26 Apr 2007

Application Notes

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More Literature

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Simulation Models

IBIS Model
- SN74AUC16374 IBIS Model (Rev. A) (Multiple File Format) 173 views
  29 Oct 2007 Read Abstract

Customers Who Evaluated This Product Also Evaluated...
Part #	Name	Product Family	Comments
SN74AUCH16374	16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs	FLIP-FLOPS, LATCHES AND REGISTERS-D-TYPE (3-STATE) FLIP-FLOPS	TI customers also evaluated this product.
SN74AUCH32374	32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS	FLIP-FLOPS, LATCHES AND REGISTERS-D-TYPE (3-STATE) FLIP-FLOPS	TI customers also evaluated this product.
SN74AUC74	Dual Positive-Edge-Triggered D-Type Flip-Flops with Clear and Preset	FLIP-FLOPS, LATCHES AND REGISTERS-D-TYPE FLIP-FLOPS	TI customers also evaluated this product.

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SN74AUC16374 Status: ACTIVE

16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs

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