SN74AUC1G74 Status: ACTIVE

Single Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset

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Datasheet

Single Positive-Edge-Triggered D-Type Flip-Flop With Clear and Preset (Rev. D) (PDF 747 KB)
25 Jun 2007

	SN74AUC1G74
tpd max(ns)	1.2
Pin/Package	8DSBGA, 8QFN, 8SM8, 8US8
IOH(mA)	-9
IOL(mA)	9
Vcc min(V)	0.8
Vcc max(V)	2.7
Approx. Price (US$)	0.31 \| 1ku
Operating Temp Range(Celsius)	-40 to 85
Technology Family	AUC
ICC(uA)	10
Rating	Catalog
	Samples
	Inventory

Customers Who Evaluated This Product Also Evaluated

SN74LVC2G74: Single Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset
SN74LVC1G175: Single D-Type Flip-Flop with Asynchronous Clear
SN74LVC1G123: Single Retriggerable Monostable Multivibrator with Schmitt-Trigger Inputs

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Product Information

Features

Available in the Texas Instruments NanoFree™ Package
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
I_off Supports Partial-Power-Down Mode Operation
Sub-1-V Operable
Max t_pd of 1.5 ns at 1.8 V
Low Power Consumption, 10-µA Max I_CC
±8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

NanoFree Is a trademark of Texas Instruments

DESCRIPTION/ORDERING INFORMATION

This single positive-edge-triggered D-type flip-flop is operational at 0.8-V to 2.7-V V_CC, but is designed specifically for 1.65-V to 1.95-V V_CC operation.

A low level at the preset (PRE) or clear (CLR) input sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. To better optimize the flip-flop for higher frequencies, the CLR input overrides the PRE input when they are both low.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Pricing / Packaging / CAD Design Tools / Samples

			Price	Packaging		CAD Design Tools	Samples
Device	Status	Temp (^oC)	Price \| Quantity	Package \| Pins	Package QTY \| Package Carrier	Footprints	Samples
SN74AUC1G74DCTR	ACTIVE	-40 to 85	0.31 \| 1ku	SM8 (DCT) \| 8	3000 \| LARGE T&R
SN74AUC1G74DCTRE4	ACTIVE	-40 to 85	0.31 \| 1ku	SM8 (DCT) \| 8	3000 \| LARGE T&R
SN74AUC1G74DCTRG4	ACTIVE	-40 to 85	0.31 \| 1ku	SM8 (DCT) \| 8	3000 \| LARGE T&R
SN74AUC1G74DCUR	ACTIVE	-40 to 85	0.31 \| 1ku	US8 (DCU) \| 8	3000 \| LARGE T&R
SN74AUC1G74DCURE4	ACTIVE	-40 to 85	0.31 \| 1ku	US8 (DCU) \| 8	3000 \| LARGE T&R
SN74AUC1G74DCURG4	ACTIVE	-40 to 85	0.31 \| 1ku	US8 (DCU) \| 8	3000 \| LARGE T&R
SN74AUC1G74RSER	ACTIVE	-40 to 85	0.35 \| 1ku	QFN (RSE) \| 8	3000 \| LARGE T&R
SN74AUC1G74RSERG4	ACTIVE	-40 to 85	0.35 \| 1ku	QFN (RSE) \| 8	3000 \| LARGE T&R
SN74AUC1G74YZPR	ACTIVE	-40 to 85	0.35 \| 1ku	DSBGA (YZP) \| 8	3000 \| LARGE T&R

* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.

Inventory

Reported Distributor Inventory as of 11:06 AM GMT, 22 Nov 2009
Region	Company	In Stock	Purchase
TI Lead Time*: 15 WeeksSN74AUC1G74DCTR
Americas	Arrow	>1k
	Avnet	>1k
	Newark	390
	Rochester Electronics	>1k
Asia	Farnell Asia	>1k
Europe	Farnell	>1k
Worldwide	DigiKey	>1k
TI Lead Time*: 15 WeeksSN74AUC1G74DCTRE4
Worldwide	DigiKey	Available
Worldwide	Mouser Electronics	>1k
TI Lead Time*: 15 WeeksSN74AUC1G74DCTRG4
Worldwide	DigiKey	Available
TI Lead Time*: 12 WeeksSN74AUC1G74DCUR
Americas	Arrow	>1k
Asia	Farnell Asia	>1k
Asia	WPI	>1k
Europe	Farnell	>1k
Europe	Spoerle	>1k
Worldwide	DigiKey	>1k
TI Lead Time*: 12 WeeksSN74AUC1G74DCURE4
Worldwide	DigiKey	Available
TI Lead Time*: 12 WeeksSN74AUC1G74DCURG4
Worldwide	DigiKey	Available
TI Lead Time*: 15 WeeksSN74AUC1G74RSER
Americas	Arrow	>1k
Asia	WPI	>1k
Worldwide	DigiKey	>1k
TI Lead Time*: 15 WeeksSN74AUC1G74RSERG4
Worldwide	DigiKey	Available
TI Lead Time*: 14 WeeksSN74AUC1G74YZPR
Americas	Rochester Electronics	>1k
View all Distributors

** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.

Quality & Lead (Pb)-Free Data

	Product Content				DPPM / MTBF / FIT Rate
Device	Eco Plan*	Lead / Ball Finish	MSL Rating / Peak Reflow	Details	Details
SN74AUC1G74DCTR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
SN74AUC1G74DCTRE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
SN74AUC1G74DCTRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
SN74AUC1G74DCUR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
SN74AUC1G74DCURE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
SN74AUC1G74DCURG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
SN74AUC1G74RSER	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
SN74AUC1G74RSERG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
SN74AUC1G74YZPR	Green (RoHS & no Sb/Br)	SNAGCU	Level-1-260C-UNLIM	View	View

* The planned eco-friendly classification: Pb-Free (RoHS) or Pb-Free (RoHS Exempt) or Green (RoHS & no Sb/Br) - please click on the Product Content Details "View" link in the table above for the latest availability information and additional product content details.

If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.

Technical Documents

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Datasheet

Single Positive-Edge-Triggered D-Type Flip-Flop With Clear and Preset (Rev. D) (PDF, 747 KB)
25 Jun 2007

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Simulation Models

HSpice Model
- HSPICE MODEL OF SN74AUC1G74 (ZIP, 94 KB) 325 views
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IBIS Model
- SN74AUC1G74 IBIS Model (Rev. A) (Multiple File Format) 284 views
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Customers Who Evaluated This Product Also Evaluated...
Part #	Name	Product Family	Comments
SN74LVC2G74	Single Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset	LITTLE LOGIC-LL FLIP-FLOP, LATCH AND REGISTER	TI customers also evaluated this product.
SN74LVC1G175	Single D-Type Flip-Flop with Asynchronous Clear	LITTLE LOGIC-LL FLIP-FLOP, LATCH AND REGISTER	TI customers also evaluated this product.
SN74LVC1G123	Single Retriggerable Monostable Multivibrator with Schmitt-Trigger Inputs	LITTLE LOGIC-LL FLIP-FLOP, LATCH AND REGISTER	TI customers also evaluated this product.
SN74AUP1G74	Low-Power Single Positive-Edge-Triggered D-Type Flip-Flop	LITTLE LOGIC-LL FLIP-FLOP, LATCH AND REGISTER	TI customers also evaluated this product.
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SN74AUC1G74 Status: ACTIVE

Single Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset

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Datasheet

Customers Who Evaluated This Product Also Evaluated

Product Information

Features

DESCRIPTION/ORDERING INFORMATION

Pricing / Packaging / CAD Design Tools / Samples

Inventory

Quality & Lead (Pb)-Free Data

Technical Documents

Datasheet

Application Notes

User Guides

Selection Guides

More Literature

Simulation Models

Support and Community

Customer Tags

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