SN74AUCH16374 Status: ACTIVE

16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs

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Datasheet

SN74AUCH16374 (Rev. D) (PDF 466 KB)
01 May 2003

	SN74AUCH16374
Vcc range(V)	0.8 to 2.7
Output Drive(mA)	-9/9
No. of Outputs	16
No. of Bits	16
Static Current	20 uA
th(ns)	0.4
tpd max(ns)	2.2
tsu(ns)	0.6
Logic	True
Technology Family	AUC
Rating	Catalog
	Samples
	Inventory

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SN74AUC16374: 16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs
SN74TVC3010: 10-Bit Voltage Clamp

Product Information

Features

Member of the Texas Instruments Widebus™ Family
Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
I_off Supports Partial-Power-Down Mode Operation
Sub 1-V Operable
Max t_pd of 2.8 ns at 1.8 V
Low Power Consumption, 20 µA Max I_CC
±l;8-mA Output Drive at 1.8 V
Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

Widebus is a trademark of Texas Instruments.

Description

This 16-bit edge-triggered D-type flip-flop is operational at 0.8-V to 2.7-V V_CC, but is designed specifically for 1.65-V to 1.95-V V_CC operation.

The SN74AUCH16374 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. It can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CLK) input, the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs.

A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

OE\ does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Pricing / Packaging / CAD Design Tools / Samples

			Price	Packaging			CAD Design Tools	Samples
Device	Status	Temp (^oC)	Price \| Quantity	Package \| Pins	Top Side Marking	Package QTY \| Package Carrier	Footprints	Samples
74AUCH16374DGGRE4	ACTIVE	-40 to 85	1.87 \| 1ku	TSSOP (DGG) \| 48	View	2000 \| LARGE T&R
74AUCH16374DGGRG4	ACTIVE	-40 to 85	1.87 \| 1ku	TSSOP (DGG) \| 48	View	2000 \| LARGE T&R
74AUCH16374DGVRE4	ACTIVE	-40 to 85	1.87 \| 1ku	TVSOP (DGV) \| 48	View	2000 \| LARGE T&R
74AUCH16374DGVRG4	ACTIVE	-40 to 85	1.87 \| 1ku	TVSOP (DGV) \| 48	View	2000 \| LARGE T&R
SN74AUCH16374DGGR	ACTIVE	-40 to 85	1.87 \| 1ku	TSSOP (DGG) \| 48	View	2000 \| LARGE T&R
SN74AUCH16374DGVR	ACTIVE	-40 to 85	1.87 \| 1ku	TVSOP (DGV) \| 48	View	2000 \| LARGE T&R
SN74AUCH16374GQLR	NRND	-40 to 85	3.08 \| 1ku	BGA MICROSTAR JUNIOR (GQL) \| 56	View	1000 \| LARGE T&R	Not Available
SN74AUCH16374ZQLR	ACTIVE	-40 to 85	2.05 \| 1ku	BGA MICROSTAR JUNIOR (ZQL) \| 56	View	1000 \| LARGE T&R	Purchase Samples

* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.

Inventory

Reported Distributor Inventory as of 11:01 AM GMT, 08 Nov 2009
Region	Company	In Stock	Purchase
TI Lead Time*: 20 Weeks74AUCH16374DGGRE4
Worldwide	DigiKey	Available
TI Lead Time*: 20 Weeks74AUCH16374DGGRG4
Worldwide	DigiKey	Available
TI Lead Time*: 12 Weeks74AUCH16374DGVRE4
None Reported View Distributors
TI Lead Time*: 12 Weeks74AUCH16374DGVRG4
None Reported View Distributors
TI Lead Time*: 20 WeeksSN74AUCH16374DGGR
Worldwide	DigiKey	776
TI Lead Time*: 12 WeeksSN74AUCH16374DGVR
Americas	Rochester Electronics	>1k
Worldwide	DigiKey	>1k
TI Lead Time*: 8 WeeksSN74AUCH16374GQLR
Americas	Rochester Electronics	>1k
Worldwide	DigiKey	1k
TI Lead Time*: 8 WeeksSN74AUCH16374ZQLR
None Reported View Distributors
View all Distributors

** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.

Quality & Lead (Pb)-Free Data

	Product Content				DPPM / MTBF / FIT Rate
Device	Eco Plan*	Lead / Ball Finish	MSL Rating / Peak Reflow	Details	Details
74AUCH16374DGGRE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
74AUCH16374DGGRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
74AUCH16374DGVRE4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
74AUCH16374DGVRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
SN74AUCH16374DGGR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
SN74AUCH16374DGVR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-1-260C-UNLIM	View	View
SN74AUCH16374GQLR	TBD	SNPB	Level-1-240C-UNLIM	View	View
SN74AUCH16374ZQLR	Green (RoHS & no Sb/Br)	SNAGCU	Level-1-260C-UNLIM	View	View

* The planned eco-friendly classification: Pb-Free (RoHS) or Pb-Free (RoHS Exempt) or Green (RoHS & no Sb/Br) - please click on the Product Content Details "View" link in the table above for the latest availability information and additional product content details.

If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.

Technical Documents

Most useful technical documents for SN74AUCH16374

Datasheet

SN74AUCH16374 (Rev. D) (PDF, 466 KB)
01 May 2003

Application Notes

TI IBIS File Creation, Validation, and Distribution Processes (HTM, 9 KB) 3849 views
29 Aug 2002 Read Abstract
Shelf-Life Evaluation of Lead-Free Component Finishes (HTM, 8 KB) 26969 views
24 May 2004 Read Abstract
Selecting the Right Level Translation Solution (Rev. A) (HTM, 8 KB) 15418 views
22 Jun 2004 Read Abstract
Understanding and Interpreting Standard-Logic Data Sheets (Rev. B) (HTM, 8 KB) 21380 views
28 May 2003 Read Abstract
Designing With TI Ultra-Low-Voltage CMOS (AUC) Octals and Widebus Devices (HTM, 8 KB) 873 views
21 Mar 2003 Read Abstract
Texas Instruments Little Logic Application Report (HTM, 8 KB) 2341 views
01 Nov 2002 Read Abstract

View Application Notes for D-Type (3-State) Flip-Flops

User Guides

LOGIC Pocket Data Book (Rev. B) (PDF, 6001 KB) 46833 views
16 Jan 2007
Signal Switch Data Book (Rev. A) (PDF, 18396 KB) 9501 views
14 Nov 2003
AUC Data Book, January 2003 (Rev. A) (PDF, 3276 KB) 2038 views
01 Jan 2003

Selection Guides

Logic Guide 2009 (Rev. Z) (PDF, 4263 KB) 88618 views
23 Jul 2009

More Literature

Logic Cross-Reference (Rev. A) (PDF, 2938 KB) 15250 views
07 Oct 2003
Design Summary for WCSP Little Logic (Rev. B) (PDF, 295 KB) 1806 views
04 Nov 2004
AUC Product Brochure (Rev. A) (PDF, 418 KB) 1335 views
18 Mar 2002
Standard Linear & Logic for PCs, Servers & Motherboards (PDF, 3997 KB) 1210 views
13 Jun 2002
STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS (PDF, 5872 KB) 480 views
27 Mar 2002

Simulation Models

IBIS Model
- SN74AUCH16374 IBIS Model (Rev. A) (Multiple File Format) 170 views
  26 Jun 2003 Read Abstract

Customers Who Evaluated This Product Also Evaluated...
Part #	Name	Product Family	Comments
SN74AUC16374	16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs	FLIP-FLOPS, LATCHES AND REGISTERS-D-TYPE (3-STATE) FLIP-FLOPS	TI customers also evaluated this product.
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SN74AUCH16374 Status: ACTIVE

16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs

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