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DOC, EPIC, and Widebus are trademarks of Texas Instruments. Description
A Dynamic Output Control (DOC) circuit is implemented, which, during the transition, initially lowers the output impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows typical VOL vs IOL and VOH vs IOH curves to illustrate the output impedance and drive capability of the circuit. At the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a high-drive standard-output device. For more information, refer to the TI application reports, AVC Logic Family Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC ) Circuitry Technology and Applications, literature number SCEA009. This 16-bit edge-triggered D-type flip-flop is operational at 1.2-V to 3.6-V VCC, but is designed specifically for 1.65-V to 3.6-V VCC operation. The SN74AVC16374 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. It can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CLK) input, the Q outputs of the flip-flop take on the logic levels at the data (D) inputs. OE\ can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components. OE\ does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The SN74AVC16374 is characterized for operation from -40°C to 85°C. |
| Price | Packaging | CAD Design Tools | Samples | |||||
| Device | Status | Temp (oC) | Price | Quantity | Package | Pins | Top Side Marking | Package QTY | Package Carrier | Footprints | Samples |
| 74AVC16374DGGRE4 | ACTIVE | -40 to 85 | 3.52 | 1ku | TSSOP (DGG) | 48 | View | 2000 | LARGE T&R | ||
| 74AVC16374DGGRG4 | ACTIVE | -40 to 85 | 3.52 | 1ku | TSSOP (DGG) | 48 | View | 2000 | LARGE T&R | ||
| 74AVC16374DGVRE4 | ACTIVE | -40 to 85 | 3.52 | 1ku | TVSOP (DGV) | 48 | View | 2000 | LARGE T&R | ||
| 74AVC16374DGVRG4 | ACTIVE | -40 to 85 | 3.52 | 1ku | TVSOP (DGV) | 48 | View | 2000 | LARGE T&R | ||
| SN74AVC16374DGGR | ACTIVE | -40 to 85 | 3.52 | 1ku | TSSOP (DGG) | 48 | View | 2000 | LARGE T&R | ||
| SN74AVC16374DGVR | ACTIVE | -40 to 85 | 3.52 | 1ku | TVSOP (DGV) | 48 | View | 2000 | LARGE T&R | ||
| SN74AVC16374GQLR | NRND | -40 to 85 | 3.87 | 1ku | BGA MICROSTAR JUNIOR (GQL) | 56 | View | 1000 | LARGE T&R | Not Available | |
| SN74AVC16374ZQLR | ACTIVE | -40 to 85 | 3.87 | 1ku | BGA MICROSTAR JUNIOR (ZQL) | 56 | View | 1000 | LARGE T&R | ||
* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.
| Reported Distributor Inventory as of 11:00 AM GMT, 08 Nov 2009 | |||
| Region | Company | In Stock | Purchase |
| TI Lead Time*: 20 Weeks74AVC16374DGGRE4 | |||
| Worldwide | DigiKey | Available | |
| TI Lead Time*: 20 Weeks74AVC16374DGGRG4 | |||
| Worldwide | DigiKey | Available | |
| TI Lead Time*: 8 Weeks74AVC16374DGVRE4 | |||
| Worldwide | DigiKey | Available | |
| TI Lead Time*: 8 Weeks74AVC16374DGVRG4 | |||
| Worldwide | DigiKey | Available | |
| TI Lead Time*: 20 WeeksSN74AVC16374DGGR | |||
| Americas | Arrow | >1k | |
| Avnet | >1k | ||
| Europe | EBV Elektronik | >1k | |
| Worldwide | DigiKey | >1k | |
| Mouser Electronics | 990 | ||
| TI Lead Time*: 8 WeeksSN74AVC16374DGVR | |||
| Americas | Rochester Electronics | >1k | |
| Europe | Avnet-SILICA | >1k | |
| Worldwide | DigiKey | >1k | |
| TI Lead Time*: 8 WeeksSN74AVC16374ZQLR | |||
| Americas | Rochester Electronics | >1k | |
| Worldwide | DigiKey | 425 | |
** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.
| Product Content | DPPM / MTBF / FIT Rate | ||||
| Device | Eco Plan* | Lead / Ball Finish | MSL Rating / Peak Reflow | Details | Details |
| 74AVC16374DGGRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | View | View |
| 74AVC16374DGGRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | View | View |
| 74AVC16374DGVRE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | View | View |
| 74AVC16374DGVRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | View | View |
| SN74AVC16374DGGR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | View | View |
| SN74AVC16374DGVR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | View | View |
| SN74AVC16374GQLR | TBD | SNPB | Level-1-240C-UNLIM | View | View |
| SN74AVC16374ZQLR | Green (RoHS & no Sb/Br) | SNAGCU | Level-1-260C-UNLIM | View | View |
* The planned eco-friendly classification: Pb-Free (RoHS) or Pb-Free (RoHS Exempt) or Green (RoHS & no Sb/Br) - please click on the Product Content Details "View" link in the table above for the latest availability information and additional product content details.
If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.
Most useful technical documents for SN74AVC16374 
View Application Notes for D-Type (3-State) Flip-Flops
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