|
|
|
|
Other qualified versions of SN74LV74A-Q1
Customers Who Evaluated This Product Also Evaluated
Product InformationFeatures
description/ordering informationThis dual positive-edge-triggered D-type flip-flop is designed for 2-V to 5.5-V VCC operation. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) inputs meeting the setup-time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. |
| Price | Packaging | CAD Design Tools | Samples | |||||
| Device | Status | Temp (oC) | Price | Quantity | Package | Pins | Top Side Marking | Package QTY | Package Carrier | Footprints | Samples |
| SN74LV74AQDRG4Q1 | ACTIVE | -40 to 125 | 0.26 | 1ku | SOIC (D) | 14 | View | 2500 | ||
| SN74LV74AQDRQ1 | ACTIVE | -40 to 125 | 0.26 | 1ku | SOIC (D) | 14 | View | 2500 | Purchase Samples | |
| SN74LV74AQPWRG4Q1 | ACTIVE | -40 to 125 | 0.26 | 1ku | TSSOP (PW) | 14 | View | 2000 | Purchase Samples | |
| SN74LV74AQPWRQ1 | ACTIVE | -40 to 125 | 0.26 | 1ku | TSSOP (PW) | 14 | View | 2000 | Purchase Samples | |
* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.
| Reported Distributor Inventory as of 10:58 AM GMT, 25 Nov 2009 | |||
| Region | Company | In Stock | Purchase |
| TI Lead Time*: 18 WeeksSN74LV74AQDRG4Q1 | |||
| None Reported View Distributors | |||
| TI Lead Time*: 18 WeeksSN74LV74AQDRQ1 | |||
| Americas | Rochester Electronics | >1k | |
| TI Lead Time*: 20 WeeksSN74LV74AQPWRG4Q1 | |||
| None Reported View Distributors | |||
| TI Lead Time*: 20 WeeksSN74LV74AQPWRQ1 | |||
| None Reported View Distributors | |||
** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.
| Product Content | DPPM / MTBF / FIT Rate | ||||
| Device | Eco Plan* | Lead / Ball Finish | MSL Rating / Peak Reflow | Details | Details |
| SN74LV74AQDRG4Q1 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | View | View |
| SN74LV74AQDRQ1 | Pb-Free (RoHS) | CU NIPDAU | Level-2-250C-1 YEAR/Level-1-235C-UNLIM | View | View |
| SN74LV74AQPWRG4Q1 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | View | View |
| SN74LV74AQPWRQ1 | Pb-Free (RoHS) | CU NIPDAU | Level-1-250C-UNLIM | View | View |
* The planned eco-friendly classification: Pb-Free (RoHS) or Pb-Free (RoHS Exempt) or Green (RoHS & no Sb/Br) - please click on the Product Content Details "View" link in the table above for the latest availability information and additional product content details.
If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.
Most useful technical documents for SN74LV74A-Q1 
| Customers Who Evaluated This Product Also Evaluated... | |||
| Part # | Name | Product Family | Comments |
| SN74AUC74 | Dual Positive-Edge-Triggered D-Type Flip-Flops with Clear and Preset | FLIP-FLOPS, LATCHES AND REGISTERS-D-TYPE FLIP-FLOPS | TI customers also evaluated this product. |
| SN74LVC1G175 | Single D-Type Flip-Flop with Asynchronous Clear | LITTLE LOGIC-LL FLIP-FLOP, LATCH AND REGISTER | TI customers also evaluated this product. |

Most Popular Tags for SN74LV74A-Q1: