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SN74LVC2G74-Q1 Status: ACTIVE

Automotive Catalog Single Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset

      
         
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Datasheet

Download - PDF Icon
  • Single Positive-Edge-Triggered D-Type Flip-Flop With Clear and Preset (Rev. C) (sn74lvc2g74-q1.pdf, 197 KB)
    09 Apr 2008 Download

 SN74LVC2G74-Q1
Voltage Nodes(V)1.8, 2.5, 3.3, 5  
Vcc min(V)1.65  
Vcc max(V)5.5  
IOH(mA)-24  
IOL(mA)24  
tpd max(ns)5.4  
ICC(uA)10  
No. of Gates2  
Technology FamilyLVC  
RatingAutomotive  
 Samples
 Inventory

Other qualified versions of SN74LVC2G74-Q1

Version Part Number Definition
Catalog SN74LVC2G74 TI's standard catalog product
Enhanced Product SN74LVC2G74-EP Supports Defense, Aerospace and Medical Applications

Customers Who Evaluated This Product Also Evaluated

  • SN74LVC2G74: Single Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset
  • TLV3502: 4.5ns Rail-to-Rail Comparator

Product Information

Features

  • Qualified for Automotive Applications
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 6.9 ns at 3.3 V
  • Low Power Consumption, 10-µA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)>2 V at VCC = 3.3 V, TA = 25°C
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

DESCRIPTION/ORDERING INFORMATION

This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.

A low level at the preset (PRE) or clear (CLR) input sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

    

Pricing / Packaging / CAD Design Tools / Samples

PricePackagingCAD Design ToolsSamples
DeviceStatusTemp (oC)Price | QuantityPackage | PinsPackage QTY | Package CarrierFootprintsSamples
SN74LVC2G74QDCURQ1ACTIVE-40 to 1250.31 | 1kuUS8 (DCU) | 8 3000 Download CAD Format for this Footprint

* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.

Inventory

  TI Inventory Status Reported Distributor Inventory
SN74LVC2G74QDCURQ1As of 9:23 AM GMT, 04 Dec 2008As of 9:23 AM GMT, 04 Dec 2008
 In StockIn Progress QTY | DateLead TimeRegionCompanyIn StockPurchase
 1812* 7812 | 17 Dec 9 Weeks AmericasAvnet >1k
 >10k | 30 Dec DigiKey >1k
  Mouser Electronics >1k
View all Distributors  

* Our information is updated daily, so please check back with us soon if this does not meet your needs. You may also contact your TI Authorized Distributor , including those listed above, for real time stock information.

** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.

Quality & Lead (Pb)-Free Data

 Product ContentDPPM / MTBF / FIT Rate
DeviceEco Plan* Lead / Ball FinishMSL Rating / Peak ReflowDetailsDetails
SN74LVC2G74QDCURQ1 RoHS Compliant Pb-Free (RoHS) CU NIPDAU Level-1-260C-UNLIMViewView

* The planned eco-friendly classification: Pb-Free (RoHS) or Pb-Free (RoHS Exempt) or Green (RoHS & no Sb/Br) - please click on the Product Content Details "View" link in the table above for the latest availability information and additional product content details.

If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.

Technical Documents

Datasheets

  • Single Positive-Edge-Triggered D-Type Flip-Flop With Clear and Preset (Rev. C) (sn74lvc2g74-q1.pdf, 197 KB)
    09 Apr 2008 Download

Application Notes

  • Selecting the Right Level Translation Solution (Rev. A) (scea035a.htm, 8 KB)
    22 Jun 2004 Abstract
  • Shelf-Life Evaluation of Lead-Free Component Finishes (szza046.htm, 8 KB)
    24 May 2004 Abstract
  • Use of the CMOS Unbuffered Inverter in Oscillator Circuits (szza043.htm, 8 KB)
    06 Nov 2003 Abstract
  • Understanding and Interpreting Standard-Logic Data Sheets (Rev. B) (szza036b.htm, 8 KB)
    28 May 2003 Abstract
  • Texas Instruments Little Logic Application Report (scea029.htm, 8 KB)
    01 Nov 2002 Abstract
  • TI IBIS File Creation, Validation, and Distribution Processes (szza034.htm, 9 KB)
    29 Aug 2002 Abstract
  • 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) (szza029b.htm, 8 KB)
    22 May 2002 Abstract
  • Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices (szza033.htm, 9 KB)
    10 May 2002 Abstract
  • Selecting the Right Texas Instruments Signal Switch (szza030.htm, 8 KB)
    07 Sep 2001 Abstract
  • Implications of Slow or Floating CMOS Inputs (Rev. C) (scba004c.htm, 8 KB)
    01 Feb 1998 Abstract
  • Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices (scea005.htm, 9 KB)
    01 Dec 1997 Abstract
  • Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) (scba012a.htm, 8 KB)
    01 Aug 1997 Abstract
  • CMOS Power Consumption and CPD Calculation (Rev. B) (scaa035b.htm, 9 KB)
    01 Jun 1997 Abstract
  • LVC Characterization Information (scba011.htm, 8 KB)
    01 Dec 1996 Abstract
  • Live Insertion (sdya012.htm, 8 KB)
    01 Oct 1996 Abstract
  • Input and Output Characteristics of Digital Integrated Circuits (sdya010.htm, 9 KB)
    01 Oct 1996 Abstract
  • Understanding Advanced Bus-Interface Products Design Guide (scaa029.pdf, 253 KB)
    01 May 1996 Download

View Application Notes for Single-Gates

User Guides

  • LOGIC Pocket Data Book (Rev. B) (scyd013b.pdf, 6001 KB)
    16 Jan 2007 Download
  • Signal Switch Data Book (Rev. A) (scdd003a.pdf, 18396 KB)
    14 Nov 2003 Download
  • LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B) (scbd152b.pdf, 13291 KB)
    18 Dec 2002 Download

More Literature

  • Communications Infrastructure Solutions Guide 1Q2008 (Rev. G) (sstc001g.pdf, 1726 KB)
    11 Feb 2008 Download
  • Logic Selection Guide 2007 (Rev. Z) (sdyu001z.pdf, 2862 KB)
    24 Apr 2007 Download
  • Dual-Supply Level Translation Product Clip (Rev. B) (scyb033b.pdf, 328 KB)
    10 Apr 2006 Download
  • Design Summary for WCSP Little Logic (Rev. B) (scet007b.pdf, 295 KB)
    04 Nov 2004 Download
  • SN74LVC1G97 and SN74LVC1G98 Product Clip (Rev. A) (scyb010a.pdf, 253 KB)
    13 Jul 2004 Download
  • Logic Cross-Reference (Rev. A) (scyb017a.pdf, 2938 KB)
    07 Oct 2003 Download
  • SN74LVC1G3157 and SNS74LVC2G53 SPDT Analog Switches (scyb014.pdf, 65 KB)
    12 Jun 2003 Download
  • Standard Linear & Logic for PCs, Servers & Motherboards (scyb005.pdf, 3997 KB)
    13 Jun 2002 Download
  • STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS (scym001.pdf, 5872 KB)
    27 Mar 2002 Download
  • Military Low Voltage Solutions (sgyn139.pdf, 103 KB)
    04 Apr 2001 Download
  • Low-Voltage Logic (LVC) Designer's Guide (scba010.htm, 8 KB)
    01 Sep 1996 Abstract
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