SN75LVDS82 Status: ACTIVE

FlatLink(TM) Receiver

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Datasheet

Flatlink (TM) Receiver (Rev. H) (PDF 336 KB)
10 May 2006

	SN75LVDS82	SN75LVDS83A	SN75LVDS83B
Number of Parallel Outputs	28
Number of Parallel Inputs		28	28
Data Throughput(MB/s)	227.5
Serial Data Receiver Channels	4
Serial Data Transmitter Channels		4	4
Type of Line Circuit	LVDS	LVDS	LVDS
Driver (RL)(Ohms)		100	100
Receiver (Vth)(mV)	100
Supply Voltage(s)(V)	3.3	3.3	3.3
Driver tpd(ns)		14.2	14.2
Receiver tpd(ns)	8.7
ICC(mA)	125	110	110
PLL Frequency(MHz)	31 - 68	10 - 100	10 - 135
Footprint	DS90C582	DS90C385A	DS90C385A
Operating Temp Range(Celsius)	0 to 70	-10 to 70	-10 to 70
Pin/Package	56TSSOP	56BGA MICROSTAR JUNIOR, 56TSSOP	56BGA MICROSTAR JUNIOR, 56TSSOP
	Samples	Samples	Samples
	Inventory	Inventory	Inventory

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Product Information

Features

4:28 Data Channel Expansion at up to 238 Mbytes/s Throughput
Suited for SVGA, XGA, or SXGA Display Data Transmission From Controller to Display With Very Low EMI
Four Data Channels and Clock Low-Voltage Differential Channels In and 28 Data and Clock Low-Voltage TTL Channels Out
Operates From a Single 3.3-V Supply With 250 mW (Typ)
5-V Tolerant SHTDN Input
Falling Clock-Edge-Triggered Outputs
Packaged in Thin Shrink Small-Outline Package (TSSOP) With 20-Mil Terminal Pitch
Consumes Less Than 1 mW When Disabled
Wide Phase-Lock Input Frequency Range. . . 31 MHz to 68 MHz
No External Components Required for PLL
Inputs Meet or Exceed the Requirements of ANSI EIA/TIA-644 Standard
Improved Replacement for the National™ DS90C582

FlatLink is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.

Description

The SN75LVDS82 FlatLink™ receiver contains four serial-in, 7-bit parallel-out shift registers, a 7× clock synthesizer, and five low-voltage differential signaling (LVDS) line receivers in a single integrated circuit.

These functions allow receipt of synchronous data from a compatible transmitter, such as the SN75LVDS81, over five balanced-pair conductors, and expansion to 28 bits of single-ended low-voltage TTL (LVTTL) synchronous data at a lower transfer rate. The SN75LVDS82 can also be used with the SN75LVDS84 or SN75LVDS85 for 21-bit transfers.

When receiving, the high-speed LVDS data is received and loaded into registers at the rate of seven times (7×) the LVDS input clock (CLKIN). The data is then unloaded to a 28-bit-wide LVTTL parallel bus at the CLKIN rate.

View All Description in Datasheet

Pricing / Packaging / CAD Design Tools / Samples

			Price	Packaging			CAD Design Tools		Samples
Device	Status	Temp (^oC)	Price \| Quantity	Package \| Pins	Top Side Marking	Package QTY \| Package Carrier	Symbols	Footprints	Samples
SN75LVDS82DGG	ACTIVE	0 to 70	2.50 \| 1ku	TSSOP (DGG) \| 56	View	35 \| TUBE	Purchase Samples
SN75LVDS82DGGG4	ACTIVE	0 to 70	2.50 \| 1ku	TSSOP (DGG) \| 56	View	35 \| TUBE	Purchase Samples
SN75LVDS82DGGR	ACTIVE	0 to 70	2.25 \| 1ku	TSSOP (DGG) \| 56	View	2000 \| LARGE T&R
SN75LVDS82DGGRG4	ACTIVE	0 to 70	2.25 \| 1ku	TSSOP (DGG) \| 56	View	2000 \| LARGE T&R

* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.

Inventory

Reported Distributor Inventory as of 10:50 AM GMT, 26 Nov 2009
Region	Company	In Stock	Purchase
TI Lead Time*: 20 WeeksSN75LVDS82DGG
Americas	Rochester Electronics	>1k
TI Lead Time*: 20 WeeksSN75LVDS82DGGG4
Americas	Rochester Electronics	195
TI Lead Time*: 20 WeeksSN75LVDS82DGGR
Americas	Rochester Electronics	815
Asia	WPI	>1k
TI Lead Time*: 20 WeeksSN75LVDS82DGGRG4
None Reported View Distributors
View all Distributors

** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.

Quality & Lead (Pb)-Free Data

	Product Content				DPPM / MTBF / FIT Rate
Device	Eco Plan*	Lead / Ball Finish	MSL Rating / Peak Reflow	Details	Details
SN75LVDS82DGG	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-2-260C-1 YEAR	View	View
SN75LVDS82DGGG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-2-260C-1 YEAR	View	View
SN75LVDS82DGGR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-2-260C-1 YEAR	View	View
SN75LVDS82DGGRG4	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-2-260C-1 YEAR	View	View

* The planned eco-friendly classification: Pb-Free (RoHS) or Pb-Free (RoHS Exempt) or Green (RoHS & no Sb/Br) - please click on the Product Content Details "View" link in the table above for the latest availability information and additional product content details.

If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.

Technical Documents

Most useful technical documents for SN75LVDS82

Datasheet

Flatlink (TM) Receiver (Rev. H) (PDF, 336 KB)
10 May 2006

Application Notes

Flatlink Data Transmission System Design Overview (Rev. A) (HTM, 8 KB) 3534 views
01 Jun 2001 Read Abstract
Time Budgeting of the Flatlink Interface Application Report (HTM, 8 KB) 1146 views
11 Jun 1997 Read Abstract

View Application Notes for FlatLink (LVDS for LCD)

Simulation Models

IBIS Model
- SN75LVDS82 IBIS Model (ZIP, 6 KB) 158 views
  14 Dec 2001

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SN75LVDS82 Status: ACTIVE

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