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TMS320C54CST Status: NRND

Digital Signal Processor (DSP Only) for Client-Side Telephony


      
         
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Alert Icon   NRND: This product is not recommended for new designs. However, the device, tool, or software continues to be in production to support existing customers. TI does not recommend using this part in a new design. TI encourages designers to consider alternative products for new designs.


Datasheet

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Product Information

Features

  • On-Chip ROM
    • 128K × 16-Bit Configured for Program Memory
    • Contains 14 TMS320™ DSP Algorithm Standard Compliant Telephony Algorithms
  • 40K x 16-Bit On-Chip RAM Composed of Five Blocks of 8K × 16-Bit On-Chip Dual-Access Program/Data RAM
  • CST Software in ROM:
    • Data Transfer (Modem up to V.32BIS 14400 bps)
    • Telephony Signals Processing (DTMF, CPTD, Caller ID)
    • Voice Processing (Echo Canceller, G726, VAD, CNG, AGC)
  • Configurable in Either:
    • Chipset Mode: Stand-Alone Telephony/Data Modem (ROM-Only Code Execution)
    • Flex Mode: Code Execution From RAM, ROM, or External.
  • Advanced Multibus Architecture With Three Separate 16-Bit Data Memory Buses and One Program Memory Bus
  • 40-Bit Arithmetic Logic Unit (ALU) Including a 40-Bit Barrel Shifter and Two Independent 40-Bit Accumulators
  • 17- × 17-Bit Parallel Multiplier Coupled to a 40-Bit Dedicated Adder for Non-Pipelined Single-Cycle Multiply/Accumulate (MAC) Operation
  • Exponent Encoder to Compute an Exponent Value of a 40-Bit Accumulator Value in a Single Cycle
  • Data Bus With a Bus Holder Feature
  • Extended Addressing Mode for 8M × 16-Bit Maximum Addressable External Program Space
  • Enhanced External Parallel Interface (XIO2)
  • Single-Instruction-Repeat and Block-Repeat Operations for Program Code
  • Block-Memory-Move Instructions for Better Program and Data Management

View All Features in Datasheet

Description

The 54CST are based on an advanced modified Harvard architecture that has one program memory bus and three data memory buses. These processors provide an arithmetic logic unit (ALU) with a high degree of parallelism, application-specific hardware logic, on-chip memory, and additional on-chip peripherals. The basis of the operational flexibility and speed of these DSPs is a highly specialized instruction set.

Separate program and data spaces allow simultaneous access to program instructions and data, providing a high degree of parallelism. Two read operations and one write operation can be performed in a single cycle. Instructions with parallel store and application-specific instructions can fully utilize this architecture.

View All Description in Datasheet

    

Pricing / Packaging / CAD Design Tools / Samples

PricePackagingCAD Design ToolsSamples
DeviceStatusPrice | QuantityPackage | PinsPackage QTY | Package CarrierSymbolsFootprintsSamples
TMS320C54CSTGGUNRND8.30 | 1kuBGA MICROSTAR (GGU) | 144 160 Download CAD Format for this Symbol Download CAD Format for this FootprintNot Available
TMS320C54CSTPGENRND8.30 | 1kuLQFP (PGE) | 144 60 Download CAD Format for this Symbol Download CAD Format for this FootprintNot Available
TMS320C54CSTZGUNRND8.30 | 1kuBGA MICROSTAR (ZGU) | 144 160 Download CAD Format for this Symbol Download CAD Format for this FootprintNot Available

* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.

Inventory

Reported Distributor Inventory as of 10:23 AM GMT, 22 Nov 2009
RegionCompanyIn StockPurchase
TI Lead Time*: 18 WeeksTMS320C54CSTGGU
EuropeCompel 82
TI Lead Time*: 20 WeeksTMS320C54CSTPGE
AmericasArrow 410
EuropeArrow Southern Europe 480
Avnet-SILICA 20
TI Lead Time*: 20 WeeksTMS320C54CSTZGU
None Reported
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** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.

Quality & Lead (Pb)-Free Data

 Product ContentDPPM / MTBF / FIT Rate
DeviceEco Plan* Lead / Ball FinishMSL Rating / Peak ReflowDetailsDetails
TMS320C54CSTGGU  TBD SNPB Level-3-220C-168 HRViewView
TMS320C54CSTPGE  Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIMViewView
TMS320C54CSTZGU  Green (RoHS & no Sb/Br) SNAGCU Level-3-260C-168 HRViewView

* The planned eco-friendly classification: Pb-Free (RoHS) or Pb-Free (RoHS Exempt) or Green (RoHS & no Sb/Br) - please click on the Product Content Details "View" link in the table above for the latest availability information and additional product content details.

If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.

Technical Documents

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Datasheet

Application Notes

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User Guides

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More Literature

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Tools & Software

NamePart # Company Tool / Software Type
Code Composer Studio IDE Subscription Service for v3.3CCSTUDIOSUBSCRIPTIONSTexas InstrumentsCode Composer Studio(TM) IDE
Code Composer Studio Integrated Development Environment (IDE) - v4.xCCSTUDIOTexas InstrumentsCode Composer Studio(TM) IDE
XDS510 Class EmulatorsXDS510Texas InstrumentsEmulators/Analyzers
XDS560 Class High Speed EmulatorsXDS560Texas InstrumentsEmulators/Analyzers
C54x UNIX SimulatorTMDS324L551-09Texas InstrumentsSimulators
TMS320C5416 DSP Starter Kit (DSK)TMDSDSK5416Texas InstrumentsStarter Kits
TMS320C54x DSP LibrarySPRC099 Texas Instruments Signal Processing Libraries 
DSP/BIOS 5.x Real-Time Operating SystemDSPBIOS5 Texas Instruments Operating Systems (OS/RTOS) 
TMS320C54x Chip Support LibrarySPRC132 Texas Instruments Application Software 

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