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TMS320C6410 Status: ACTIVE

Fixed-Point Digital Signal Processor

      
         
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Datasheet

Download - PDF Icon
  • TMS320C6413, TMS320C6410 Fixed-Point Digital Signal Processors (Rev. F) (tms320c6410.pdf, 1788 KB)
    16 Jan 2006 Download
  • TMS320C6413, TMS320C6410 DSPs Silicon Errata (Rev. C) (sprz219c.pdf, 141 KB)
    24 Nov 2004 Download
  • TMS320C6410 Hardware Designer's Resource Guide (Rev. B) (spraa40b.htm, 8 KB)
    24 Oct 2005 Abstract


 TMS320C6410-400
CPU1 C64x  
Peak MMACS3200  
Frequency(MHz)400  
On-Chip L1/SRAM32 KB  
On-Chip L2/SRAM128 KB  
EMIF1 32-Bit  
External Memory Type SupportedAsync SRAM,SDRAM,SBSRAM  
DMA64-Ch EDMA  
HPI1 32/16-Bit  
McBSP2  
I2C2  
McASP2  
Trace EnabledYes  
Timers3 32-Bit GP  
Core Supply (Volts)1.2 V  
IO Supply (Volts)3.3 V  
Operating Temperature Range (°C)0 to 90  
 Samples
 Inventory Not Available

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Product Information

Features

  • High-Performance Fixed-Point Digital Signal Processor (TMS320C6413/C6410)
    • TMS320C6413
      • 2-ns Instruction Cycle Time
      • 500-MHz Clock Rate
      • 4000 MIPS
    • TMS320C6410
      • 2.5-ns Instruction Cycle Time
      • 400-MHz Clock Rate
      • 3200 MIPS
    • Eight 32-Bit Instructions/Cycle
    • Fully Software-Compatible With C64x™
    • Extended Temperature Devices Available
  • VelociTI.2™ Extensions to VelociTI™ Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x™ DSP Core
    • Eight Highly Independent Functional Units With VelociTI.2™ Extensions:
      • Six ALUs (32-/40-Bit), Each Supports Single 32-Bit, Dual 16-Bit, or Quad 8-Bit Arithmetic per Clock Cycle
      • Two Multipliers Support Four 16 x 16-Bit Multiplies (32-Bit Results) per Clock Cycle or Eight 8 x 8-Bit Multiplies (16-Bit Results) per Clock Cycle
    • Load-Store Architecture With Non-Aligned Support
    • 64 32-Bit General-Purpose Registers
    • Instruction Packing Reduces Code Size
    • All Instructions Conditional
  • Instruction Set Features
    • Byte-Addressable (8-/16-/32-/64-Bit Data)
    • 8-Bit Overflow Protection
    • Bit-Field Extract, Set, Clear
    • Normalization, Saturation, Bit-Counting
    • VelociTI.2™ Increased Orthogonality
  • VelociTI.2™ Extensions to VelociTI™ Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x™ DSP Core
  • L1/L2 Memory Architecture
    • 128K-Bit (16K-Byte) L1P Program Cache (Direct Mapped)
    • 128K-Bit (16K-Byte) L1D Data Cache (2-Way Set-Associative)
    • 2M-Bit (256K-Byte) L2 Unified Mapped RAM/Cache [C6413] (Flexible RAM/Cache Allocation)
    • 1M-Bit (128K-Byte) L2 Unified Mapped RAM/Cache [C6410] (Flexible RAM/Cache Allocation)
  • Endianess: Little Endian, Big Endian
  • 32-Bit External Memory Interface (EMIF)
    • Glueless Interface to Asynchronous Memories (SRAM and EPROM) and Synchronous Memories (SDRAM, SBSRAM, ZBT SRAM, and FIFO)
    • 512M-Byte Total Addressable External Memory Space
  • Enhanced Direct-Memory-Access (EDMA) Controller (64 Independent Channels)
  • Host-Port Interface (HPI) [32-/16-Bit]
  • Two Multichannel Audio Serial Ports (McASPs) - with Six Serial Data Pins each
  • Two Inter-Integrated Circuit (I2C) Buses
    • Additional GPIO Capability
  • Two Multichannel Buffered Serial Ports
  • Three 32-Bit General-Purpose Timers
  • Sixteen General-Purpose I/O (GPIO) Pins
  • Flexible PLL Clock Generator
  • On-Chip Fundamental Oscillator
  • IEEE-1149.1 (JTAG) Boundary-Scan-Compatible
  • 288-Pin Ball Grid Array (BGA) Package (GTS and ZTS Suffixes), 1.0-mm Ball Pitch
  • 0.13-µm/6-Level Cu Metal Process (CMOS)
  • 3.3-V I/Os, 1.2-V Internal

VelociTI.2, VelociTI, and TMS320C64x are trademarks of Texas Instruments.
All trademarks are the property of their respective owners.
IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.
TMS320C6000, and C6000 are trademarks of Texas Instruments.

Description

The TMS320C64x™ DSPs (including the TMS320C6413, TMS320C6410 devices) are the highest-performance fixed-point DSP generation in the TMS320C6000™ DSP platform. The TMS320C6413 and TMS320C6410 (C6413 and C6410) devices are based on the second-generation high-performance, advanced VelociTI™ very-long-instruction-word (VLIW) architecture (VelociTI.2™) developed by Texas Instruments (TI)™ The high-performance, lower-cost C6413/C6410 DSPs enable customers to reduce system costs for telecom, medical, industrial, office, and photo lab equipment. The C64x™ is a code-compatible member of the C6000™ DSP platform.

With performance of up to 4000 million instructions per second (MIPS) at a clock rate of 500 MHz, the C6413 device offers cost-effective solutions to high-performance DSP programming challenges.

With performance of up to 3200 million instructions per second (MIPS) at a clock rate of 400 MHz, the C6410 device offers cost-effective solutions to high-performance DSP programming challenges. The C6410 device also provides excellent value for packet telephony and for other cost-sensitive applications demanding high performance. The C6410 device also provides excellent value for packet telephony and to other cost-sensitive applications demanding high performance

The C6413/C6410 DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. The C64x™ DSP core processor has 64 general-purpose registers of 32-bit word length and eight highly independent functional units—two multipliers for a 32-bit result and six arithmetic logic units (ALUs)— with VelociTI.2™ extensions. The VelociTI.2™ extensions in the eight functional units include new instructions to accelerate the performance in video and imaging applications and extend the parallelism of the VelociTI™ architecture. The C6413 can produce four 16-bit multiply-accumulates (MACs) per cycle for a total of 2000 million MACs per second (MMACS), or eight 8-bit MACs per cycle for a total of 4000 MMACS. The C6410 can produce four 16-bit multiply-accumulates (MACs) per cycle for a total of 1600 million MACs per second (MMACS), or eight 8-bit MACs per cycle for a total of 3200 MMACS. The C6413/C6410 DSP also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals similar to the other C6000™ DSP platform devices.

The C6413/C6410 uses a two-level cache-based architecture and has a powerful and diverse set of peripherals. The Level 1 program cache (L1P) is a 128-Kbit direct mapped cache and the Level 1 data cache (L1D) is a 128-Kbit 2-way set-associative cache. The Level 2 memory/cache (L2) consists of an 2-Mbit memory space that is shared between program and data space [for C6413 device] and the Level 2 memory/cache (L2) consists of an 1-Mbit memory space that is shared between program and data space [for C6410 device]. L2 memory can be configured as mapped memory, cache, or combinations of the two. The peripheral set includes: two multichannel buffered audio serial ports (McASPs); two inter-integrated circuit bus modules (I2Cs) ; two multichannel buffered serial ports (McBSPs); three 32-bit general-purpose timers; a user-configurable 16-bit or 32-bit host-port interface (HPI16/HPI32); a 16-pin general-purpose input/output port (GP0) with programmable interrupt/event generation modes; and a 32-bit glueless external memory interface (EMIFA), which is capable of interfacing to synchronous and asynchronous memories and peripherals.

The McASP port supports one transmit and one receive clock zone, with eight serial data pins which can be individually allocated to any of the two zones. The serial port supports time-division multiplexing on each pin from 2 to 32 time slots. The C6413/C6410 has sufficient bandwidth to support all 8 serial data pins transmitting a 192-kHz stereo signal. Serial data in each zone may be transmitted and received on multiple serial data pins simultaneously and formatted in a multitude of variations on the Philips Inter-IC Sound (I2S) format.

In addition, the McASP transmitter may be programmed to output multiple S/PDIF, IEC60958, AES-3, CP-430 encoded data channels simultaneously, with a single RAM containing the full implementation of user data and channel status fields.

McASP also provides extensive error-checking and recovery features, such as the bad clock detection circuit for each high-frequency master clock which verifies that the master clock is within a programmed frequency range.

The I2C ports on the TMS320C6413/C6410 allows the DSP to easily control peripheral devices and communicate with a host processor. In addition, the standard multichannel buffered serial port (McBSP) may be used to communicate with serial peripheral interface (SPI) mode peripheral devices.

TheC6413/C6410 has a complete set of development tools which includes: a new C compiler, an assembly optimizer to simplify programming and scheduling, and a Windows™ debugger interface for visibility into source code execution.

    

Pricing / Packaging / CAD Design Tools / Samples

PricePackagingCAD Design ToolsSamples
DeviceStatusPrice | QuantityPackage | PinsPackage QTY | Package CarrierSymbolsFootprintsSamples
TMS320C6410GTS400ACTIVE19.65 | 100uFCBGA (GTS) | 288 60 Download CAD Format for this Symbol Download CAD Format for this FootprintPurchase Samples
TMS320C6410ZTS400ACTIVE19.65 | 100uFCBGA (ZTS) | 288 60 Download CAD Format for this Symbol Download CAD Format for this FootprintPurchase Samples
TMS320C6410ZTSA400ACTIVE23.60 | 100uFCBGA (ZTS) | 288 60 Download CAD Format for this Symbol Download CAD Format for this FootprintPurchase Samples
TMX320C6410GTSACTIVE FCBGA (GTS) | 288   Download CAD Format for this Symbol Download CAD Format for this FootprintPurchase Samples

* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.

Inventory

  TI Inventory Status Reported Distributor Inventory
TMS320C6410GTS400As of 8:09 AM GMT, 12 Oct 2008As of 8:09 AM GMT, 12 Oct 2008
 In StockIn Progress QTY | DateLead TimeRegionCompanyIn StockPurchase
 0* 1536 | 21 Nov 16 Weeks None Reported
View Distributors		   
 8903 | 3 Dec     
TMS320C6410ZTS400As of 8:09 AM GMT, 12 Oct 2008As of 8:09 AM GMT, 12 Oct 2008
 In StockIn Progress QTY | DateLead TimeRegionCompanyIn StockPurchase
 0* 6290 | 14 Oct 16 Weeks AmericasAvnet 62
 1539 | 14 Nov Rochester Electronics 3
 8923 | 26 Nov     
TMS320C6410ZTSA400As of 8:09 AM GMT, 12 Oct 2008As of 8:09 AM GMT, 12 Oct 2008
 In StockIn Progress QTY | DateLead TimeRegionCompanyIn StockPurchase
 1855* 819 | 24 Nov 16 Weeks AmericasRochester Electronics 24
 8923 | 4 Dec     
 >10k | 19 Dec     
View all Distributors  

* Our information is updated daily, so please check back with us soon if this does not meet your needs. You may also contact your TI Authorized Distributor , including those listed above, for real time stock information.

** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.

Quality & Lead (Pb)-Free Data

 Product ContentDPPM / MTBF / FIT Rate
DeviceEco Plan* Lead / Ball FinishMSL Rating / Peak ReflowDetailsDetails
TMS320C6410GTS400  TBD SNPB Level-4-220C-72 HRViewView
TMS320C6410ZTS400  Pb-Free (RoHS Exempt) SNAGCU Level-4-260C-72HRViewView
TMS320C6410ZTSA400  Pb-Free (RoHS Exempt) SNAGCU Level-4-260C-72HRViewView

* The planned eco-friendly classification: Pb-Free (RoHS) or Pb-Free (RoHS Exempt) or Green (RoHS & no Sb/Br) - please click on the Product Content Details "View" link in the table above for the latest availability information and additional product content details.

If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.

Technical Documents

Datasheets

  • TMS320C6413, TMS320C6410 Fixed-Point Digital Signal Processors (Rev. F) (tms320c6410.pdf, 1788 KB)
    16 Jan 2006 Download
  • TMS320C6413, TMS320C6410 DSPs Silicon Errata (Rev. C) (sprz219c.pdf, 141 KB)
    24 Nov 2004 Download

Application Notes

  • TMS320C6000 EMIF-to-External SDRAM Interface (Rev. E) (spra433e.htm, 8 KB)
    04 Sep 2007 Abstract
  • Thermal Considerations for the DM64xx, DM64x, and C6000 Devices (spraal9.htm, 8 KB)
    20 May 2007 Abstract
  • TMS320C6410 Hardware Designer's Resource Guide (Rev. B) (spraa40b.htm, 8 KB)
    24 Oct 2005 Abstract
  • TMS320C64x to TMS320C64x+ CPU Migration Guide (Rev. A) (spraa84a.htm, 8 KB)
    20 Oct 2005 Abstract
  • TMS320C6410/13 Power Consumption Summary (spraa59.htm, 9 KB)
    20 Sep 2004 Abstract
  • Use and Handling of Semiconductor Packages With ENIG Pad Finishes (spraa55.htm, 8 KB)
    31 Aug 2004 Abstract
  • TMS320C64x Reference Design (spraa21.htm, 8 KB)
    12 May 2004 Abstract
  • TMS320C6000 Tools: Vector Table and Boot ROM Creation (Rev. D) (spra544d.htm, 8 KB)
    26 Apr 2004 Abstract
  • TMS320C6000 Board Design: Considerations for Debug (Rev. C) (spra523c.htm, 8 KB)
    21 Apr 2004 Abstract
  • TMS320C6000 McBSP Initialization (Rev. C) (spra488c.htm, 8 KB)
    08 Mar 2004 Abstract
  • TMS320C6000 EDMA IO Scheduling and Performance (spraa00.htm, 8 KB)
    05 Mar 2004 Abstract
  • TMS320C64x DSP Host Port Interface (HPI) Performance (spra964.htm, 8 KB)
    24 Oct 2003 Abstract
  • TMS320C6000 EMIF to TMS320C6000 Host Port Interface (Rev. B) (spra536b.htm, 8 KB)
    12 Sep 2003 Abstract
  • Using IBIS Models for Timing Analysis (Rev. A) (spra839a.htm, 8 KB)
    15 Apr 2003 Abstract
  • TMS320C6000 McBSP Interface to an ST-BUS Device (Rev. B) (spra511b.htm, 9 KB)
    04 Jun 2002 Abstract
  • TMS320C6000 Board Design for JTAG (Rev. C) (spra584c.htm, 8 KB)
    02 Apr 2002 Abstract
  • TMS320C6000 EMIF to External Flash Memory (Rev. A) (spra568a.htm, 8 KB)
    13 Feb 2002 Abstract
  • Cache Usage in High-Performance DSP Applications with the TMS320C64x (spra756.htm, 9 KB)
    13 Dec 2001 Abstract
  • Using a TMS320C6000 McBSP for Data Packing (Rev. A) (spra551a.htm, 9 KB)
    31 Oct 2001 Abstract
  • TMS320C6000 Enhanced DMA: Example Applications (Rev. A) (spra636a.htm, 9 KB)
    24 Oct 2001 Abstract
  • TMS320C6000 Host Port to MC68360 Interface (Rev. A) (spra545a.htm, 8 KB)
    30 Sep 2001 Abstract
  • Using the TMS320C6000 McBSP as a High Speed Communication Port (Rev. A) (spra455a.htm, 9 KB)
    31 Aug 2001 Abstract
  • TMS320C6000 Host Port to the i80960 Microprocessors Interface (Rev. A) (spra541a.htm, 8 KB)
    31 Aug 2001 Abstract
  • TMS320C6000 EMIF to External Asynchronous SRAM Interface (Rev. A) (spra542a.htm, 8 KB)
    31 Aug 2001 Abstract
  • TMS320C6000 McBSP to Voice Band Audio Processor (VBAP) Interface (Rev. A) (spra489a.htm, 9 KB)
    23 Jul 2001 Abstract
  • TMS320C6000 McBSP: AC'97 Codec Interface (TLV320AIC27) (Rev. A) (spra528a.htm, 9 KB)
    10 Jul 2001 Abstract
  • TMS320C6000 McBSP: Interface to SPI ROM (Rev. C) (spra487c.htm, 8 KB)
    30 Jun 2001 Abstract
  • TMS320C6000 Host Port to MPC860 Interface (Rev. A) (spra546a.htm, 8 KB)
    21 Jun 2001 Abstract
  • TMS320C6000 McBSP: IOM-2 Interface (Rev. A) (spra569a.htm, 8 KB)
    21 May 2001 Abstract
  • Circular Buffering on TMS320C6000 (Rev. A) (spra645a.htm, 8 KB)
    12 Sep 2000 Abstract
  • TMS320C6000 McBSP as a TDM Highway (Rev. A) (spra491a.htm, 9 KB)
    11 Sep 2000 Abstract
  • TMS320C6000 Multichannel Communications System Interface (spra637.htm, 9 KB)
    03 Feb 2000 Abstract
  • TMS320C6000 u-Law and a-Law Companding with Software or the McBSP (spra634.htm, 9 KB)
    02 Feb 2000 Abstract
  • General Guide to Implement Logarithmic and Exponential Operations on Fixed-Point (spra619.htm, 8 KB)
    31 Jan 2000 Abstract
  • TMS320C6000 C Compiler: C Implementation of Intrinsics (spra616.htm, 8 KB)
    07 Dec 1999 Abstract
  • TMS320C6000 HPI Boot Operation (spra512.htm, 8 KB)
    06 Jan 1999 Abstract

View Application Notes for TMS320C6410/12/13/18 DSPs

User Guides

  • TMS320C6000 Optimizing Compiler v 6.1 User's Guide (Rev. O) (spru187o.htm, 8 KB)
    15 May 2008 Abstract
  • TMS320C6000 Assembly Language Tools v 6.1 User's Guide (Rev. Q) (spru186q.htm, 8 KB)
    15 May 2008 Abstract
  • TMS320C6000 DSP Multichannel Audio Serial Port (McASP) Reference Guide (Rev. J) (spru041j.htm, 8 KB)
    20 Mar 2008 Abstract
  • TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide (Rev. G) (spru732g.htm, 8 KB)
    20 Feb 2008 Abstract
  • TMS320C6000 DSP Peripherals Overview Reference Guide (Rev. O) (spru190o.htm, 8 KB)
    03 Dec 2007 Abstract
  • TMS320C6000 DSP External Memory Interface (EMIF) Reference Guide (Rev. E) (spru266e.htm, 8 KB)
    11 Apr 2007 Abstract
  • TMS320C6000 DSP Inter-Integrated Circuit (I2C) Module Reference Guide (Rev. D) (spru175d.htm, 8 KB)
    26 Mar 2007 Abstract
  • TMS320C6000 DSP Multichannel Buffered Serial Port ( McBSP) Reference Guide (Rev. G) (spru580g.htm, 8 KB)
    14 Dec 2006 Abstract
  • TMS320C6000 DSP Enhanced Direct Memory Access (EDMA) Controller Reference Guide (Rev. C) (spru234c.htm, 8 KB)
    15 Nov 2006 Abstract
  • TMS320C64x DSP Two Level Internal Memory Reference Guide (Rev. C) (spru610c.htm, 8 KB)
    28 Feb 2006 Abstract
  • TMS320C6000 DSP Host-Post Interface (HPI) Reference Guide (Rev. C) (spru578c.htm, 8 KB)
    01 Jan 2006 Abstract
  • TMS320C6000 DSP Power-Down Logic and Modes Reference Guide (Rev. C) (spru728c.htm, 8 KB)
    01 Mar 2005 Abstract
  • TMS320C6000 DSP 32-bit Timer Reference Guide (Rev. B) (spru582b.htm, 8 KB)
    25 Jan 2005 Abstract
  • TMS320 DSP/BIOS User's Guide (Rev. F) (spru423f.pdf, 2673 KB)
    30 Nov 2004 Download
  • TMS320C6410/13/18 DSP Inter-Integrated Circuit (I2C) Module Addendum to SPRU175 (Rev. A) (sprz221a.htm, 8 KB)
    13 Aug 2004 Abstract
  • TMS320C6000 Chip Support Library API Reference Guide (Rev. J) (spru401j.htm, 8 KB)
    13 Aug 2004 Abstract
  • TMS320C6000 DSP General-Purpose Input/Output (GPIO) Reference Guide (Rev. A) (spru584a.htm, 8 KB)
    25 Mar 2004 Abstract
  • TMS320C6000 DSP Designing for JTAG Emulation Reference Guide (spru641.htm, 8 KB)
    31 Jul 2003 Abstract
  • TMS320C6000 DSP Cache User's Guide (Rev. A) (spru656a.htm, 8 KB)
    05 May 2003 Abstract

View User Guides for TMS320C6410/12/13/18 DSPs

Simulation Models

  • IBIS Model
    • C6410 GTS IBIS Model (Rev. A) (sprm149a.ibs, 387 KB)
      05 Aug 2004 ibis
      • | zip
  • BSDL Model
    • C6410 GTS BSDL Model (Rev. B) (sprm148b.zip, 7 KB)
      24 May 2006 zip

View Simulation Models for TMS320C6410/12/13/18 DSPs

White Papers

View White Papers for TMS320C6410/12/13/18 DSPs

More Literature

  • Digital Media Software Product Bulletin (Rev. E) (sprt390e.pdf, 170 KB)
    16 Nov 2007 Download
  • TMS320C6000 DSP TCP/IP Stack Software (Rev. C) (sprt356c.pdf, 126 KB)
    04 Apr 2007 Download

View More Literature for TMS320C6410/12/13/18 DSPs

Tools & Software

NamePart # Company Tool / Software Type
Code Composer Studio IDECCSTUDIOTexas InstrumentsCode Composer Studio(TM) IDE
C6416 Test & Evaluation BoardTMDX3260C6416Texas InstrumentsDevelopment Boards/EVMs
C6416 Test Evaluation Board (TEB) bundled with CCS & 510PP+ EmulatorTMDX3260E6416Texas InstrumentsDevelopment Boards/EVMs
Network and Video Development KitTMDX3PNV6416STexas InstrumentsDevelopment Platforms
Video Security over IP (VSIP) (NTSC)TMDXVSK642Texas InstrumentsDevelopment Platforms
XDS510 Class EmulatorsXDS510Texas InstrumentsEmulators/Analyzers
XDS560 Trace EmulatorXDS560TRACETexas InstrumentsEmulators/Analyzers
Blackhawk™ LAN560 JTAG EmulatorBlackhawkEmulators/Analyzers
Blackhawk™ PCI560 JTAG Emulator for TI DSPsBlackhawkEmulators/Analyzers
Blackhawk™ USB560 JTAG EmulatorBlackhawkEmulators/Analyzers
Blackhawk™ USB560BP JTAG EmulatorBlackhawkEmulators/Analyzers
Blackhawk™ XDS560 Trace SystemBlackhawkEmulators/Analyzers
JTAGjet USB 2.0 Emulator for TMS320Signum SystemsEmulators/Analyzers
XDS510PP PLUS JTAG EmulatorSpectrum Digital, Inc.Emulators/Analyzers
XDS510USB JTAG EmulatorSpectrum Digital, Inc.Emulators/Analyzers
XDS510USB PLUS JTAG EmulatorSpectrum Digital, Inc.Emulators/Analyzers
Small Form Factor (SFF) Software Defined Radio (SDR) Development PlatformTMDSSFFSDRTexas InstrumentsHardware Reference Designs
TMS320C6000 Chip Support LibrarySPRC090 Texas Instruments Application Software 
TMS320C64x DSP LibrarySPRC092 Texas Instruments Signal Processing Libraries 
TMS320C62x/TMS320C64x FastRTS LibrarySPRC122 Texas Instruments Signal Processing Libraries 
TMS320C64x Image LibrarySPRC094 Texas Instruments Signal Processing Libraries 
VirtualLogix™ VLX for Digital Multimedia VirtualLogix Operating Systems (OS/RTOS) 
C64x+DSPLIBSPRC265 Texas Instruments Signal Processing Libraries 
C64x+BEDSPLIBSPRC263 Texas Instruments Signal Processing Libraries 
  • TMS320C6410 ORCAD Symbol(sprc172.zip, 5 KB )
               10 Jun 2004 zip

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