TMS320C6712 Status:OBSOLETE

Floating-Point Digital Signal Processor

      
         
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This Product is no longer available

Replaced By:

  • TMS320C6712D The device has the SAME FUNCTIONALITY and PINOUT as the compared device but is NOT an exact equivalent. 

Datasheet

Download - PDF Icon
  • TMS320C6712, TMS320C6712C Floating-Point Digital Signal Processors (Rev. M) (tms320c6712.pdf, 1602 KB)
    10 Nov 2005 Download
  • TMS320C6712/C6712C/C6712D DSPs Silicon Errata (Revs 1.0, 1.1, 1.2, 1.3, 2.0) (Rev. O) (sprz182o.pdf, 317 KB)
    12 Aug 2005 Download

Product Information

Features

  • Low-Price/High-Performance Floating-Point Digital Signal Processors (DSPs):
    TMS320C67x™ (TMS320C6712, C6712C)
    • Eight 32-Bit Instructions/Cycle
    • 100-, 150-MHz Clock Rates
    • 10-, 6.7-ns Instruction Cycle Times
    • 600, 900 MFLOPS
  • Advanced Very Long Instruction Word (VLIW) C67x™ DSP Core
    • Eight Highly Independent Functional Units:
      • Four ALUs (Floating- and Fixed-Point)
      • Two ALUs (Fixed-Point)
      • Two Multipliers (Floating- and Fixed-Point)
    • Load-Store Architecture With 32 32-Bit General-Purpose Registers
    • Instruction Packing Reduces Code Size
    • All Instructions Conditional
  • Instruction Set Features
    • Hardware Support for IEEE Single-Precision and Double-Precision Instructions
    • Byte-Addressable (8-, 16-, 32-Bit Data)
    • 8-Bit Overflow Protection
    • Saturation
    • Bit-Field Extract, Set, Clear
    • Bit-Counting
    • Normalization
  • L1/L2 Memory Architecture
    • 32K-Bit (4K-Byte) L1P Program Cache (Direct Mapped)
    • 32K-Bit (4K-Byte) L1D Data Cache (2-Way Set-Associative)
    • 512K-Bit (64K-Byte) L2 Unified Mapped RAM/Cache (Flexible Data/Program Allocation)
  • Device Configuration
    • Boot Mode: 8- and 16-Bit ROM Boot
    • Endianness: Little Endian (12/12C)
      Little Endian, Big Endian (12D)
  • Enhanced Direct-Memory-Access (EDMA) Controller (16 Independent Channels)
  • 16-Bit External Memory Interface (EMIF)
    • Glueless Interface to Asynchronous Memories: SRAM and EPROM
    • Glueless Interface to Synchronous Memories: SDRAM and SBSRAM
    • 256M-Byte Total Addressable External Memory Space
  • Two Multichannel Buffered Serial Ports (McBSPs)
    • Direct Interface to T1/E1, MVIP, SCSA Framers
    • ST-Bus-Switching Compatible
    • Up to 256 Channels Each
    • AC97-Compatible
    • Serial-Peripheral-Interface (SPI) Compatible (Motorola™)
  • Two 32-Bit General-Purpose Timers
  • Flexible Phase-Locked-Loop (PLL) Clock Generator [C6712]
  • Flexible Software-Configurable PLL-Based Clock Generator Module [C6712C]
  • A Dedicated General-Purpose Input/Output (GPIO) Module With 5 Pins [12C]
  • IEEE-1149.1 (JTAG) Boundary-Scan-Compatible
  • 256-Pin Ball Grid Array (BGA) Package (GFN Suffix) [C6712 Only]
  • 272-Pin Ball Grid Array (BGA) Package (GDP and ZDP Suffix) [C6712C Only] (
  • CMOS Technology
    • 0.13-µm/6-Level Copper Metal Process (C6712C)
    • 0.18-µm/5-Level Metal Process (C6712)
  • 3.3-V I/Os, 1.20-V Internal (C6712C)
  • 3.3-V I/Os, 1.8-V Internal (C6712)

TMS320C67x and C67x are trademarks of Texas Instruments.
Motorola is a trademark of Motorola, Inc.
Other trademarks are the property of their respective owners.
IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.
These values are compatible with existing 1.26V designs.
TMS320C6000 and C6000 are trademarks of Texas Instruments.
Windows is a registered trademark of the Microsoft Corporation.
Throughout the remainder of this document, the TMS320C6712, TMS320C6712C, and TMS320C6712D shall be referred to as TMS320C67x or C67x where generic, and where specific, their individual full device part numbers will be used or abbreviated as C6712, C6712C, C6712D, 12, 12C, or 12D, etc.

Description

The TMS320C67x™ DSPs (including the TMS320C6712, TMS320C6712C, TMS320C6712D devices) are members of the floating-point DSP family in the TMS320C6000™ DSP platform. The C6712, C6712C, and C6712D devices are based on the high-performance, advanced very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for multichannel and multifunction applications.

With performance of up to 900 million floating-point operations per second (MFLOPS) at a clock rate of 150 MHz, the C6712C device is the lowest-cost DSP in the C6000™ DSP platform. The C6712C DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. This processor has 32 general-purpose registers of 32-bit word length and eight highly independent functional units. The eight functional units provide four floating-/fixed-point ALUs, two fixed-point ALUs, and two floating-/fixed-point multipliers. The C6712C can produce two MACs per cycle for a total of 300 MMACS.

With performance of up to 600 million floating-point operations per second (MFLOPS) at a clock rate of 100 MHz, the C6712 device also offers cost-effective solutions to high-performance DSP programming challenges. The C6712 DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. This processor has 32 general-purpose registers of 32-bit word length and eight highly independent functional units. The eight functional units provide four floating-/fixed-point ALUs, two fixed-point ALUs, and two floating-/fixed-point multipliers. The C6712 can produce two multiply-accumulates (MACs) per cycle for a total of 200 million MACs per second (MMACS).

The C6712/C6712C uses a two-level cache-based architecture and has a powerful and diverse set of peripherals. The Level 1 program cache (L1P) is a 32-Kbit direct mapped cache and the Level 1 data cache (L1D) is a 32-Kbit 2-way set-associative cache. The Level 2 memory/cache (L2) consists of a 512-Kbit memory space that is shared between program and data space. L2 memory can be configured as mapped memory, cache, or combinations of the two. The peripheral set includes two multichannel buffered serial ports (McBSPs), two general-purpose timers, and a glueless 16-bit external memory interface (EMIF) capable of interfacing to SDRAM, SBSRAM, and asynchronous peripherals. The C6712C device also includes a dedicated general-purpose input/output (GPIO) peripheral module.

The C6712/C6712C DSPs also have application-specific hardware logic, on-chip memory, and additional on-chip peripherals.

The C6712/C6712C has a complete set of development tools which includes: a new C compiler, an assembly optimizer to simplify programming and scheduling, and a Windows™ debugger interface for visibility into source code execution.

    

Pricing / Packaging / CAD Design Tools / Samples

PackagingCAD Design ToolsSamples
DeviceStatusReplaced ByPackage | PinsSymbolsFootprintsSamples
TMS320C6712CGDP150OBSOLETETMS320C6712DGDP150BGA (GDP) | 272 Download CAD Format for this Symbol Download CAD Format for this FootprintReplaced by TMS320C6712DGDP150

Inventory

  TI Inventory Status Reported Distributor Inventory
TMS320C6712CGDP150As of 7:59 AM GMT, 20 Aug 2008As of 7:59 AM GMT, 20 Aug 2008
 In StockIn Progress QTY | DateLead TimeRegionCompanyIn StockPurchase
 0*  Call**AmericasRochester Electronics 2
View all Distributors  

* Our information is updated daily, so please check back with us soon if this does not meet your needs. You may also contact your TI Authorized Distributor , including those listed above, for real time stock information.

** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.

Quality & Lead (Pb)-Free Data

If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.

Technical Documents

Datasheets

  • TMS320C6712, TMS320C6712C Floating-Point Digital Signal Processors (Rev. M) (tms320c6712.pdf, 1602 KB)
    10 Nov 2005 Download
  • TMS320C6712/C6712C/C6712D DSPs Silicon Errata (Revs 1.0, 1.1, 1.2, 1.3, 2.0) (Rev. O) (sprz182o.pdf, 317 KB)
    12 Aug 2005 Download

Application Notes

  • TMS320C6000 EMIF-to-External SDRAM Interface (Rev. E) (spra433e.htm, 8 KB)
    04 Sep 2007 Abstract
  • Migrating from TMS320C6712/C6712C to TMS320C6712D (Rev. F) (spra852f.htm, 9 KB)
    11 Nov 2005 Abstract
  • TMS320C6711D, C6712D, C6713B Power Consumption Summary (Rev. A) (spra889a.htm, 9 KB)
    31 May 2004 Abstract
  • TMS320C6000 Tools: Vector Table and Boot ROM Creation (Rev. D) (spra544d.htm, 8 KB)
    26 Apr 2004 Abstract
  • TMS320C6000 Board Design: Considerations for Debug (Rev. C) (spra523c.htm, 8 KB)
    21 Apr 2004 Abstract
  • TMS320C6000 McBSP Initialization (Rev. C) (spra488c.htm, 8 KB)
    08 Mar 2004 Abstract
  • TMS320C621x/671x EDMA Performance Data (spraa03.htm, 8 KB)
    05 Mar 2004 Abstract
  • TMS320C6000 EDMA IO Scheduling and Performance (spraa00.htm, 8 KB)
    05 Mar 2004 Abstract
  • TMS320C621x/TMS320C671x EDMA Architecture (spra996.htm, 8 KB)
    05 Mar 2004 Abstract
  • How to Begin Development Today w/ High Performance Floating Point TMS320C67x DSP (spra908.htm, 8 KB)
    23 Apr 2003 Abstract
  • Using IBIS Models for Timing Analysis (Rev. A) (spra839a.htm, 8 KB)
    15 Apr 2003 Abstract
  • TMS320C6000 McBSP Interface to an ST-BUS Device (Rev. B) (spra511b.htm, 9 KB)
    04 Jun 2002 Abstract
  • TMS320C6000 HPI to PCI Interfacing Using the PLX PCI9050 (Rev. C) (spra537c.htm, 8 KB)
    17 Apr 2002 Abstract
  • TMS320C6000 DMA Example Applications (Rev. A) (spra529a.htm, 9 KB)
    10 Apr 2002 Abstract
  • TMS320C6000 Board Design for JTAG (Rev. C) (spra584c.htm, 8 KB)
    02 Apr 2002 Abstract
  • TMS320C6000 EMIF to External Flash Memory (Rev. A) (spra568a.htm, 8 KB)
    13 Feb 2002 Abstract
  • Using a TMS320C6000 McBSP for Data Packing (Rev. A) (spra551a.htm, 9 KB)
    31 Oct 2001 Abstract
  • TMS320C6000 Enhanced DMA: Example Applications (Rev. A) (spra636a.htm, 9 KB)
    24 Oct 2001 Abstract
  • Interfacing theTMS320C6000 EMIFto a PCI Bus Using the AMCC S5933 PCI Controller (Rev. A) (spra479a.htm, 8 KB)
    30 Sep 2001 Abstract
  • TMS320C6000 Host Port to MC68360 Interface (Rev. A) (spra545a.htm, 8 KB)
    30 Sep 2001 Abstract
  • Using the TMS320C6000 McBSP as a High Speed Communication Port (Rev. A) (spra455a.htm, 9 KB)
    31 Aug 2001 Abstract
  • TMS320C6000 Host Port to the i80960 Microprocessors Interface (Rev. A) (spra541a.htm, 8 KB)
    31 Aug 2001 Abstract
  • TMS320C6000 EMIF to External Asynchronous SRAM Interface (Rev. A) (spra542a.htm, 8 KB)
    31 Aug 2001 Abstract
  • TMS320C6000 System Clock Circuit Example (Rev. A) (spra430a.htm, 8 KB)
    15 Aug 2001 Abstract
  • TMS320C6000 McBSP to Voice Band Audio Processor (VBAP) Interface (Rev. A) (spra489a.htm, 9 KB)
    23 Jul 2001 Abstract
  • TMS320C6000 McBSP: AC'97 Codec Interface (TLV320AIC27) (Rev. A) (spra528a.htm, 9 KB)
    10 Jul 2001 Abstract
  • TMS320C6000 McBSP: Interface to SPI ROM (Rev. C) (spra487c.htm, 8 KB)
    30 Jun 2001 Abstract
  • TMS320C6000 Host Port to MPC860 Interface (Rev. A) (spra546a.htm, 8 KB)
    21 Jun 2001 Abstract
  • TMS320C6000 McBSP: IOM-2 Interface (Rev. A) (spra569a.htm, 8 KB)
    21 May 2001 Abstract
  • TMS320C621x/C671x EDMA Queue Management Guidelines (spra720.htm, 9 KB)
    07 Nov 2000 Abstract
  • Circular Buffering on TMS320C6000 (Rev. A) (spra645a.htm, 8 KB)
    12 Sep 2000 Abstract
  • TMS320C6000 McBSP as a TDM Highway (Rev. A) (spra491a.htm, 9 KB)
    11 Sep 2000 Abstract
  • How to Begin Development with the TMS320C6712 DSP (spra693.htm, 8 KB)
    24 Jul 2000 Abstract
  • TMS320C6000 u-Law and a-Law Companding with Software or the McBSP (spra634.htm, 9 KB)
    02 Feb 2000 Abstract
  • TMS320C6000 C Compiler: C Implementation of Intrinsics (spra616.htm, 8 KB)
    07 Dec 1999 Abstract
  • TMS320C6000 McBSP: I2S Interface (spra595.htm, 9 KB)
    08 Sep 1999 Abstract

View Application Notes for TMS320C67x DSPs

User Guides

  • TMS320C6000 DSP Peripherals Overview Reference Guide (Rev. O) (spru190o.htm, 8 KB)
    03 Dec 2007 Abstract
  • TMS320C6000 DSP External Memory Interface (EMIF) Reference Guide (Rev. E) (spru266e.htm, 8 KB)
    11 Apr 2007 Abstract
  • TMS320C6000 DSP Multichannel Buffered Serial Port ( McBSP) Reference Guide (Rev. G) (spru580g.htm, 8 KB)
    14 Dec 2006 Abstract
  • TMS320C6000 DSP Enhanced Direct Memory Access (EDMA) Controller Reference Guide (Rev. C) (spru234c.htm, 8 KB)
    15 Nov 2006 Abstract
  • TMS320C67x/C67x+ DSP CPU and Instruction Set Reference Guide (Rev. A) (spru733a.htm, 8 KB)
    07 Nov 2006 Abstract
  • TMS320C6000 DSP Power-Down Logic and Modes Reference Guide (Rev. C) (spru728c.htm, 8 KB)
    01 Mar 2005 Abstract
  • TMS320C6000 DSP 32-bit Timer Reference Guide (Rev. B) (spru582b.htm, 8 KB)
    25 Jan 2005 Abstract
  • TMS320C6000 Chip Support Library API Reference Guide (Rev. J) (spru401j.htm, 8 KB)
    13 Aug 2004 Abstract
  • TMS320C6000 DSP Software-Programmable Phase-Locked Loop (PLL) Controller RG (Rev. C) (spru233c.htm, 8 KB)
    02 Aug 2004 Abstract
  • TMS320C621x/C671x DSP Two Level Internal Memory Reference Guide (Rev. B) (spru609b.htm, 8 KB)
    08 Jun 2004 Abstract
  • TMS320C6000 DSP General-Purpose Input/Output (GPIO) Reference Guide (Rev. A) (spru584a.htm, 8 KB)
    25 Mar 2004 Abstract
  • TMS320C6000 DSP Designing for JTAG Emulation Reference Guide (spru641.htm, 8 KB)
    31 Jul 2003 Abstract
  • TMS320C6000 DSP Cache User's Guide (Rev. A) (spru656a.htm, 8 KB)
    05 May 2003 Abstract

View User Guides for TMS320C67x DSPs

Simulation Models

  • IBIS Model
    • C6712 GFN IBIS Model (Rev. A) (sprm087a.ibs, 61 KB)
      27 Jun 2003 ibis
    • | zip
    • C6712C GDP IBIS Model (Rev. A) (sprm107a.ibs, 272 KB)
      19 Mar 2003 ibis
    • | zip
    • C6712D GDP IBIS Model (sprm144.ibs, 273 KB)
      07 Jan 2004 ibis
    • | zip

View Simulation Models for TMS320C67x DSPs

White Papers

View White Papers for TMS320C67x DSPs

More Literature

View More Literature for TMS320C67x DSPs

Tools & Software

NamePart # Company Tool / Software Type
Code Composer Studio IDECCSTUDIOTexas InstrumentsCode Composer Studio(TM) IDE
Code Composer Studio IDE Subscription ServiceCCSTUDIOSUBSCRIPTIONSTexas InstrumentsCode Composer Studio(TM) IDE
C6701 EVM bundled with Code Composer StudioTMDSEVM6701-4Texas InstrumentsDevelopment Boards/EVMs
C6701 Evaluation Module (EVM) BundleTMDS32600C6701Texas InstrumentsDevelopment Boards/EVMs
Multichannel Vocoder Demonstration Software for C6211 or C6711 DSKMCVTDK6211Texas InstrumentsDevelopment Platforms
XDS510 Class EmulatorsXDS510Texas InstrumentsEmulators/Analyzers
XDS560 Class High Speed EmulatorsXDS560Texas InstrumentsEmulators/Analyzers
C6711 DSP Starter Kit (DSK)TMDS320006711Texas InstrumentsStarter Kits
TMS320C6713 DSP Starter Kit (DSK)TMDSDSK6713Texas InstrumentsStarter Kits
TMS320C6000 Chip Support LibrarySPRC090 Texas Instruments Application Software 
Driver Developer's Kit (DDK)SPRC118 Texas Instruments Application Software 
TMS320C67x DSP LibrarySPRC121 Texas Instruments Signal Processing Libraries 
TMS320C67x Fast RTS LibrarySPRC060 Texas Instruments Signal Processing Libraries 
DSP/BIOS Real-Time KernelDSPBIOS Texas Instruments Operating Systems (OS/RTOS) 

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