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TMS320DM640 Status: ACTIVE

Video/Imaging Fixed-Point Digital Signal Processor


      
         
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 TMS320DM640-400
CPU1 C64x; Video  
Peak MMACS3200  
Frequency(MHz)400  
On-Chip L1/SRAM32 KB  
On-Chip L2/SRAM128 KB  
EMIF1 32-Bit  
External Memory Type SupportedAsync SRAM,SDRAM,SBSRAM  
DMA64-Ch EDMA  
Video Port (Configurable)1 8-Bit Single-Ch  
VIC1  
EMAC10/100  
McBSP2  
I2C1  
McASP1  
Trace EnabledYes  
Timers3 32-Bit GP  
Core Supply (Volts)1.2 V  
IO Supply (Volts)3.3 V  
Operating Temperature Range (°C)0 to 90  
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Product Information

Features

  • High-Performance Digital Media Processor (TMS320DM641/TMS320DM640)
    • 2.5-, 2-, 1.67-ns Instruction Cycle Time
    • 400-, 500-, 600-MHz Clock Rate
    • Eight 32-Bit Instructions/Cycle
    • 3200, 4000, 4800 MIPS
    • Fully Software-Compatible With C64x™
  • VelociTI.2™ Extensions to VelociTI™ Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x™ DSP Core
    • Eight Highly Independent Functional Units With VelociTI.2™ Extensions:
      • Six ALUs (32-/40-Bit), Each Supports Single 32-Bit, Dual 16-Bit, or Quad 8-Bit Arithmetic per Clock Cycle
      • Two Multipliers Support Four 16 x 16-Bit Multiplies (32-Bit Results) per Clock Cycle or Eight 8 x 8-Bit Multiplies (16-Bit Results) per Clock Cycle
    • Load-Store Architecture With Non-Aligned Support
    • 64 32-Bit General-Purpose Registers
    • Instruction Packing Reduces Code Size
    • All Instructions Conditional
  • Instruction Set Features
    • Byte-Addressable (8-/16-/32-/64-Bit Data)
    • 8-Bit Overflow Protection
    • Bit-Field Extract, Set, Clear
    • Normalization, Saturation, Bit-Counting
    • VelociTI.2™ Increased Orthogonality
  • L1/L2 Memory Architecture
    • 128K-Bit (16K-Byte) L1P Program Cache (Direct Mapped)
    • 128K-Bit (16K-Byte) L1D Data Cache (2-Way Set-Associative)
    • 1M-Bit (128K-Byte) L2 Unified Mapped RAM/Cache (Flexible RAM/Cache Allocation)
  • Endianess: Little Endian, Big Endian
  • 32-Bit External Memory Interface (EMIF)
    • Glueless Interface to Asynchronous Memories (SRAM and EPROM) and Synchronous Memories (SDRAM, SBSRAM, ZBT SRAM, and FIFO)
    • 1024M-Byte Total Addressable External Memory Space
  • Enhanced Direct-Memory-Access (EDMA) Controller (64 Independent Channels)
  • 10/100 Mb/s Ethernet MAC (EMAC)
    • IEEE 802.3 Compliant
    • Media Independent Interface (MII)
    • 8 Independent Transmit (TX) and 1 Receive (RX) Channel
  • Management Data Input/Output (MDIO)
  • Two Configurable Video Ports (DM641)
  • One Configurable Video Port (DM640)
    • Providing a Glueless I/F to Common Video Decoder and Encoder Devices
    • Supports Multiple Resolutions and Video Standards
  • VCXO Interpolated Control Port (VIC)
    • Supports Audio/Video Synchronization
  • Host-Port Interface (HPI) [16-Bit] (DM641)
  • Multichannel Audio Serial Port (McASP)
    • Four Serial Data Pins
    • Wide Variety of I2S and Similar Bit Stream Format
    • Integrated Digital Audio I/F Transmitter Supports S/PDIF, IEC60958-1, AES-3, CP-430 Formats
  • Inter-Integrated Circuit (I2C) Bus
  • Two Multichannel Buffered Serial Ports
  • Three 32-Bit General-Purpose Timers
  • Eight General-Purpose I/O (GPIO) Pins
  • Flexible PLL Clock Generator
  • IEEE-1149.1 (JTAG) Boundary-Scan-Compatible
  • 548-Pin Ball Grid Array (BGA) Package (GDK and ZDK Suffixes), 0.8-mm Ball Pitch
  • 548-Pin Ball Grid Array (BGA) Package (GNZ and ZNZ Suffixes), 1.0-mm Ball Pitch
  • 0.13-µm/6-Level Cu Metal Process (CMOS)
  • 3.3-V I/Os, 1.2-V Internal (-400, -500)
  • 3.3-V I/Os, 1.4-V Internal (-600)

C64x, VelociTI.2, VelociTI, and TMS320C64x are trademarks of Texas Instruments.
All trademarks are the property of their respective owners.
IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.
TMS320C6000 and C6000 are trademarks of Texas Instruments.
Windows is a registered trademark of the Microsoft Corporation.

Description

The TMS320C64x™ DSPs (including the TMS320DM641 and TMS320DM640 devices) are the highest-performance fixed-point DSP generation in the TMS320C6000™ DSP platform. The TMS320DM641 (DM641) and TMS320DM640 (DM640) devices are based on the second-generation high-performance, advanced VelociTI™ very-long-instruction-word (VLIW) architecture (VelociTI.2™) developed by Texas Instruments (TI), making these DSPs an excellent choice for digital media applications. The C64x™ is a code-compatible member of the C6000™ DSP platform.

With performance of up to 4800 million instructions per second (MIPS) at a clock rate of 600 MHz, the DM641 device offers cost-effective solutions to high-performance DSP programming challenges.

With performance of up to 3200 million instructions per second (MIPS) at a clock rate of 400 MHz, the DM640 device offers cost-effective solutions to high-performance DSP programming challenges.

The DM641/DM640 DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. The C64x™ DSP core processor has 64 general-purpose registers of 32-bit word length and eight highly independent functional units—two multipliers for a 32-bit result and six arithmetic logic units (ALUs)—with VelociTI.2™ extensions. The VelociTI.2™ extensions in the eight functional units include new instructions to accelerate the performance in video and imaging applications and extend the parallelism of the VelociTI™ architecture. The DM641 can produce four 16-bit multiply-accumulates (MACs) per cycle for a total of 2400 million MACs per second (MMACS), or eight 8-bit MACs per cycle for a total of 4800 MMACS. The DM640 can produce four 16-bit multiply-accumulates (MACs) per cycle for a total of 1600 million MACs per second (MMACS), or eight 8-bit MACs per cycle for a total of 3200 MMACS. The DM641/DM640 DSP also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals similar to the other C6000™ DSP platform devices.

The DM641/DM640 uses a two-level cache-based architecture and has a powerful and diverse set of peripherals. The Level 1 program cache (L1P) is a 128-Kbit direct mapped cache and the Level 1 data cache (L1D) is a 128-Kbit 2-way set-associative cache. The Level 2 memory/cache (L2) consists of an 1-Mbit memory space that is shared between program and data space. L2 memory can be configured as mapped memory, cache, or combinations of the two. The peripheral set includes: two configurable video ports (DM641); one configurable video port (DM640); a 10/100 Mb/s Ethernet MAC (EMAC); a management data input/output (MDIO) module; a VCXO interpolated control port (VIC); one 4-bit multichannel buffered audio serial port (McASP0); an inter-integrated circuit (I2C) Bus module; two multichannel buffered serial ports (McBSPs); three 32-bit general-purpose timers; a 16-bit host-port interface (HPI16); a 8-pin general-purpose input/output port (GP0) with programmable interrupt/event generation modes; and a 32-bit glueless external memory interface (EMIFA), which is capable of interfacing to synchronous and asynchronous memories and peripherals.

The DM641 device has two single-channel 8-bit configurable video port peripherals (VP0 and VP1). The DM640 device has one single-channel 8-bit configurable video port peripheral (VP0). These video port peripherals provide a glueless interface to common video decoder and encoder devices. The DM641/DM640 video port peripherals support multiple resolutions and video standards (e. g., CCIR601 and ITU–).

These video port peripherals are configurable and can support either video capture and/or video display modes.

For more details on the Video Port peripherals, see the TMS320C64x DSP Video Port/VCXO Interpolated Control (VIC) Port Reference Guide (literature number SPRU629).

The McASP0 port supports one transmit and one receive clock zone, with four serial data pins which can be individually allocated to any of the two zones. The serial port supports time-division multiplexing on each pin from 2 to 32 time slots. The DM641/DM640 has sufficient bandwidth to support all 4 serial data pins transmitting a 192-kHz stereo signal. Serial data in each zone may be transmitted and received on multiple serial data pins simultaneously and formatted in a multitude of variations on the Philips Inter-IC Sound (I2S) format.

In addition, the McASP0 transmitter may be programmed to output multiple S/PDIF, IEC60958, AES-3, CP-430 encoded data channels simultaneously, with a single RAM containing the full implementation of user data and channel status fields.

McASP0 also provides extensive error-checking and recovery features, such as the bad clock detection circuit for each high-frequency master clock which verifies that the master clock is within a programmed frequency range.

The VCXO interpolated control (VIC) port provides digital-to-analog conversion with resolution from 9-bits to up to 16-bits. The output of the VIC is a single bit interpolated D/A output. For more details on the VIC port, see the TMS320C64x DSP Video Port/VCXO Interpolated Control (VIC) Port Reference Guide (literature number SPRU629).

The ethernet media access controller (EMAC) provides an efficient interface between the DM641/DM640 DSP core processor and the network. The DM641/DM640 EMAC supports both 10Base-T and 100Base-TX, or 10 Mbits/second (Mbps) and 100 Mbps in either half- or full-duplex, with hardware flow control and quality of service (QOS) support. The DM641/DM640 EMAC makes use of a custom interface to the DSP core that allows efficient data transmission and reception. For more details on the EMAC, see the TMS320C6000 DSP Ethernet Media Access Controller (EMAC) / Management Data Input/Output (MDIO) Module Reference Guide (literature number SPRU628).

The management data input/output (MDIO) module continuously polls all 32 MDIO addresses in order to enumerate all PHY devices in the system. Once a PHY candidate has been selected by the DSP, the MDIO module transparently monitors its link state by reading the PHY status register. Link change events are stored in the MDIO module and can optionally interrupt the DSP, allowing the DSP to poll the link status of the device without continuously performing costly MDIO accesses. For more details on the MDIO, see the TMS320C6000 DSP Ethernet Media Access Controller (EMAC) / Management Data Input/Output (MDIO) Module Reference Guide (literature number SPRU628).

The I2C0 port on the TMS320DM641/DM640 allows the DSP to easily control peripheral devices and communicate with a host processor. In addition, the standard multichannel buffered serial port (McBSP) may be used to communicate with serial peripheral interface (SPI) mode peripheral devices.

The DM641/DM640 has a complete set of development tools which includes: a new C compiler, an assembly optimizer to simplify programming and scheduling, and a Windows™ debugger interface for visibility into source code execution.

    

Pricing / Packaging / CAD Design Tools / Samples

PricePackagingCAD Design ToolsSamples
DeviceStatusPrice | QuantityPackage | PinsPackage QTY | Package CarrierSymbolsFootprintsSamples
TMS320DM640AGDK4ACTIVE24.25 | 100uFC/CSP (GDK) | 548 60 Download CAD Format for this Symbol Download CAD Format for this FootprintPurchase Samples
TMS320DM640AGNZ4ACTIVE24.25 | 100uFCBGA (GNZ) | 548 40 Download CAD Format for this Symbol Download CAD Format for this FootprintPurchase Samples
TMS320DM640AGNZA4ACTIVE29.10 | 100uFCBGA (GNZ) | 548 40 Download CAD Format for this Symbol Download CAD Format for this FootprintPurchase Samples
TMS320DM640AZDK4ACTIVE24.25 | 100uFCBGA (ZDK) | 548 60 Download CAD Format for this Symbol Download CAD Format for this FootprintPurchase Samples
TMS320DM640AZDKA4ACTIVE29.10 | 100uFCBGA (ZDK) | 548 60  Download CAD Format for this FootprintPurchase Samples
TMS320DM640AZNZ4ACTIVE24.25 | 100uFCBGA (ZNZ) | 548 40 Download CAD Format for this Symbol Download CAD Format for this FootprintPurchase Samples
TMS320DM640AZNZA4ACTIVE29.10 | 100uFCBGA (ZNZ) | 548 40  Purchase Samples
TMS320DM640GDK400OBSOLETE FC/CSP (GDK) | 548   Download CAD Format for this Symbol Download CAD Format for this FootprintNot Available
TMS320DM640GNZ400OBSOLETE FCBGA (GNZ) | 548   Download CAD Format for this Symbol Download CAD Format for this FootprintNot Available

* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.

Inventory

Reported Distributor Inventory as of 10:14 AM GMT, 06 Nov 2009
RegionCompanyIn StockPurchase
TI Lead Time*: 20 WeeksTMS320DM640AGDK4
AmericasRochester Electronics >1k
TI Lead Time*: 18 WeeksTMS320DM640AGNZ4
None Reported
View Distributors
TI Lead Time*: 18 WeeksTMS320DM640AGNZA4
AmericasRochester Electronics 910
TI Lead Time*: 6 WeeksTMS320DM640AZDK4
AmericasArrow >1k
Rochester Electronics 309
TI Lead Time*: 20 WeeksTMS320DM640AZDKA4
None Reported
View Distributors
TI Lead Time*: 20 WeeksTMS320DM640AZNZ4
AmericasAvnet 58
Rochester Electronics >1k
EuropeSpoerle 360
TI Lead Time*: 20 WeeksTMS320DM640AZNZA4
AmericasRochester Electronics 61
Call**TMS320DM640GDK400
AmericasRochester Electronics >1k
Call**TMS320DM640GNZ400
AmericasRochester Electronics 212
View all Distributors  

** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.

Quality & Lead (Pb)-Free Data

 Product ContentDPPM / MTBF / FIT Rate
DeviceEco Plan* Lead / Ball FinishMSL Rating / Peak ReflowDetailsDetails
TMS320DM640AGDK4  TBD SNPB Level-4-220C-72 HRViewView
TMS320DM640AGNZ4  TBD SNPB Level-4-220C-72 HRViewView
TMS320DM640AGNZA4  TBD SNPB Level-4-220C-72 HRViewView
TMS320DM640AZDK4  Pb-Free (RoHS Exempt) SNAGCU Level-4-260C-72HRViewView
TMS320DM640AZDKA4  Pb-Free (RoHS Exempt) SNAGCU Level-4-260C-72HRViewView
TMS320DM640AZNZ4  Pb-Free (RoHS Exempt) SNAGCU Level-4-260C-72HRViewView
TMS320DM640AZNZA4  Pb-Free (RoHS Exempt) SNAGCU Level-4-260C-72HRViewView

* The planned eco-friendly classification: Pb-Free (RoHS) or Pb-Free (RoHS Exempt) or Green (RoHS & no Sb/Br) - please click on the Product Content Details "View" link in the table above for the latest availability information and additional product content details.

If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.

Technical Documents

Most useful technical documents for TMS320DM640 Help

Datasheet

Application Notes

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User Guides

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Selection Guides

Errata

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Tools & Software

NamePart # Company Tool / Software Type
Code Composer Studio IDE Subscription Service for v3.3CCSTUDIOSUBSCRIPTIONSTexas InstrumentsCode Composer Studio(TM) IDE
Code Composer Studio Integrated Development Environment (IDE) - v4.xCCSTUDIOTexas InstrumentsCode Composer Studio(TM) IDE
DM642 Evaluation ModuleTMDSEVM642Texas InstrumentsDevelopment Boards/EVMs
DaVinci™ Prototyping Board (DVPB)eInfochipsDevelopment Boards/EVMs
DM648 Digital Video Development PlatformTMDSDVP648Texas InstrumentsDevelopment Platforms
DM64x Digital Media Developer's Kit with NTSC CameraTMDSDMK642Texas InstrumentsDevelopment Platforms
Network and Video Development KitTMDX3PNV6416STexas InstrumentsDevelopment Platforms
SMT8039 Video & Imaging KitSundance Multiprocessor Technology LTDDevelopment Platforms
XDS510 Class EmulatorsXDS510Texas InstrumentsEmulators/Analyzers
XDS560 Class High Speed EmulatorsXDS560Texas InstrumentsEmulators/Analyzers
XDS560 Trace EmulatorXDS560TRACETexas InstrumentsEmulators/Analyzers
XDS510USB PLUS JTAG EmulatorSpectrum Digital, Inc.Emulators/Analyzers
FlashBurn Porting KitTMDSSDSFBPKTexas InstrumentsFlash Tools
TMS320C6416 DSP Starter Kit (DSK)TMDSDSK6416Texas InstrumentsStarter Kits
TMS320C6000 Chip Support LibrarySPRC090 Texas Instruments Application Software 
C62x/C64x Fast Run-Time Support (RTS) LibrarySPRC122 Texas Instruments Signal Processing Libraries 
C64x+ Image Library (IMGLIB)SPRC264 Texas Instruments Signal Processing Libraries 
Driver Developer's Kit (DDK)SPRC118 Texas Instruments Application Software 
C64x+ IQMath Library - A Virtual Floating Point EngineSPRC542 Texas Instruments Signal Processing Libraries 
MP3 Audio EncoderTMDMP3E Texas Instruments Algorithms / Codecs 
Linux Digital Video Software Development Kits (DVSDK) for DaVinci DevicesLINUXDVSDK-DV Texas Instruments Operating Systems (OS/RTOS) 
Video Imaging Co-Processor (VICP) Signal Processing LibrarySPRC831 Texas Instruments Signal Processing Libraries 
DSP/BIOS Real-Time KernelDSPBIOS Texas Instruments Operating Systems (OS/RTOS) 

Simulation Models

View Simulation Models for TMS320DM64x DSPs

Part # Name Product Family Comments
PTH08T230W   6-A, 4.5V to 14V Input, Non-Isolated, Wide Output Adjustable Power Module with TurboTrans   PLUG-IN POWER MODULES - NON-ISOLATED POL      
PTH08080W   2.25 A, 4.5-V to 18-V Input Wide Adjust Miniature Power Module   PLUG-IN POWER MODULES - NON-ISOLATED POL      
TPS5130   Triple Synchronous Buck Controller with LDO Controller   NON-ISOLATED SWITCHING DC/DC REGULATORS - DC/DC CONTROLLERS (EXTERNAL SWITCH)      
TPS54110   Low Input Voltage 1.5A Step Down SWIFT™ Converter with Adjustable Output Voltage   DC/DC CONVERTERS (INTEGRATED SWITCH) - STEP-DOWN REGULATORS      
TPS54610   3V to 6V, 6A Synchronous Step Down SWIFT™ Converter   DC/DC CONVERTERS (INTEGRATED SWITCH) - STEP-DOWN REGULATORS      
TPS5410   5.5V to 36V, 1A, 500kHz Step Down SWIFT ™ Converter   DC/DC CONVERTERS (INTEGRATED SWITCH) - STEP-DOWN REGULATORS      
TPS54550   4.5V to 20V, 6A Synchronous Step Down SWIFT™ Converter   DC/DC CONVERTERS (INTEGRATED SWITCH) - STEP-DOWN REGULATORS      
TPS79618   Single Output LDO, 1.0A, Fixed(1.8V), Low Noise, High PSRR   LINEAR REGULATORS - SINGLE CHANNEL LDO      
TPS73201   Single Output LDO, 250mA, Adj.(1.2 to 5.5V), Low Noise, Fast Transient Response   LINEAR REGULATORS - SINGLE CHANNEL LDO      
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