TMS320DM6435 Status: ACTIVE

Digital Media Processor


      
         
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Datasheet

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Functional Block Diagram


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 TMS320DM6435-400TMS320DM6435-500TMS320DM6435-600TMS320DM6435-700
CPU1 C64x+; DaVinci Video  1 C64x+; DaVinci Video  1 C64x+; DaVinci Video  1 C64x+; DaVinci Video  
Peak MMACS3200  4000  4800  5600  
Frequency(MHz)400  500  600  700  
On-Chip L1/SRAM112 KB  112 KB  112 KB  112 KB  
On-Chip L2/SRAM128 KB  128 KB  128 KB  128 KB  
ROM64 KB (Boot)  64 KB (Boot)  64 KB (Boot)  64 KB (Boot)  
EMIF1 8-Bit EMIFA,1 32/16-Bit DDR2  1 8-Bit EMIFA,1 32/16-Bit DDR2  1 8-Bit EMIFA,1 32/16-Bit DDR2  1 8-Bit EMIFA,1 32/16-Bit DDR2  
External Memory Type SupportedAsync SRAM,DDR2 SDRAM,NAND Flash  Async SRAM,DDR2 SDRAM,NAND Flash  Async SRAM,DDR2 SDRAM,NAND Flash  Async SRAM,DDR2 SDRAM,NAND Flash  
DMA64-Ch EDMA  64-Ch EDMA  64-Ch EDMA  64-Ch EDMA  
Video Port (Configurable)1 Dedicated Input  1 Dedicated Input  1 Dedicated Input  1 Dedicated Input  
Hardware AcceleratorsResizer,Previewer,H3A  Resizer,Previewer,H3A  Resizer,Previewer,H3A  Resizer,Previewer,H3A  
EMAC10/100  10/100  10/100  10/100  
CAN1 HECC  1 HECC  1 HECC  1 HECC  
HPI1 16-Bit  1 16-Bit  1 16-Bit  1 16-Bit  
McBSP1  1  1  1  
I2C1  1  1  1  
UART2  2  2  2  
VLYNQ1  1  1  1  
PWM3  3  3  3  
McASP1  1  1  1  
Timers2 64-Bit GP,1 64-Bit WD  2 64-Bit GP,1 64-Bit WD  2 64-Bit GP,1 64-Bit WD  2 64-Bit GP,1 64-Bit WD  
Core Supply (Volts)1.2 V,1.05 V  1.2 V,1.05 V  1.2 V,1.05 V  1.2 V,1.05 V  
IO Supply (Volts)1.8 V,3.3 V  1.8 V,3.3 V  1.8 V,3.3 V  1.8 V,3.3 V  
Operating Temperature Range (°C)0 to 90,-40 to 125  0 to 90,-40 to 125  0 to 90,-40 to 125  0 to 90,-40 to 125  
 SamplesSamplesSamplesSamples
 InventoryInventoryInventoryInventory Not Available

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Product Information

Features

  • Get started today with production-ready, easy-to-use audio and video codecs for digital media processors based on DaVinci™ technology. Also available are various O/S Board Support Packages and software updates. All codecs are available for FREE evaluation. REQUEST FREE SOFTWARE!
  • High-Performance Digital Media Processor (DM6435)
    • 2.5-, 2-, 1.67, 1.51-, 1.43-ns Instruction Cycle Time
    • 400-, 500-, 600-, 660-, 700-MHz C64x+™ Clock Rate
    • Eight 32-Bit C64x+ Instructions/Cycle
    • 3200, 4000, 4800, 5280, 5600 MIPS
    • Fully Software-Compatible With C64x
    • Commercial and Automotive (Q or S suffix) Grades
    • Low-Power Device (L suffix)
  • VelociTI.2™ Extensions to VelociTI™ Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x+™ DSP Core
    • Eight Highly Independent Functional Units With VelociTI.2 Extensions:
      • Six ALUs (32-/40-Bit), Each Supports Single 32-Bit, Dual 16-Bit, or Quad 8-Bit Arithmetic per Clock Cycle
      • Two Multipliers Support Four 16 × 16-Bit Multiplies (32-Bit Results) per Clock Cycle or Eight 8 × 8-Bit Multiplies (16-Bit Results) per Clock Cycle
    • Load-Store Architecture With Non-Aligned Support
    • 64 32-Bit General-Purpose Registers
    • Instruction Packing Reduces Code Size
    • All Instructions Conditional
    • Additional C64x+™ Enhancements
      • Protected Mode Operation
      • Exceptions Support for Error Detection and Program Redirection
      • Hardware Support for Modulo Loop Auto-Focus Module Operation
  • C64x+ Instruction Set Features
    • Byte-Addressable (8-/16-/32-/64-Bit Data)
    • 8-Bit Overflow Protection
    • Bit-Field Extract, Set, Clear
    • Normalization, Saturation, Bit-Counting
    • VelociTI.2 Increased Orthogonality
    • C64x+ Extensions
      • Compact 16-bit Instructions
      • Additional Instructions to Support Complex Multiplies
  • C64x+ L1/L2 Memory Architecture
    • 256K-Bit (32K-Byte) L1P Program RAM/Cache [Flexible Allocation]
    • 640K-Bit (80K-Byte) L1D Data RAM/Cache [Flexible Allocation]
    • 1M-Bit (128K-Byte) L2 Unified Mapped RAM/Cache [Flexible Allocation]
  • Supports Little Endian Mode Only
  • Video Processing Subsystem (VPSS), VPFE Only
    • Front End Provides:
      • CCD and CMOS Imager Interface
      • BT.601/BT.656 Digital YCbCr 4:2:2 (8-/16-Bit) Interface
      • Preview Engine for Real-Time Image Processing
      • Glueless Interface to Common Video Decoders
      • Histogram Module
      • Auto-Exposure, Auto-White Balance and Auto-Focus Module
      • Resize Engine
        • Resize Images From 1/4× to 4×
        • Separate Horizontal/Vertical Control
  • External Memory Interfaces (EMIFs)
    • 32-Bit DDR2 SDRAM Memory Controller With 256M-Byte Address Space (1.8-V I/O)
      • Supports up to 333-MHz (data rate) bus and interfaces to DDR2-400 SDRAM
    • Asynchronous 8-Bit Wide EMIF (EMIFA) With up to 64M-Byte Address Reach
      • Flash Memory Interfaces
        • NOR (8-Bit-Wide Data)
        • NAND (8-Bit-Wide Data)
  • Enhanced Direct-Memory-Access (EDMA) Controller (64 Independent Channels)
  • Two 64-Bit General-Purpose Timers (Each Configurable as Two 32-Bit Timers)
  • One 64-Bit Watch Dog Timer
  • Two UARTs (One with RTS and CTS Flow Control)
  • Master/Slave Inter-Integrated Circuit (I2C Bus™)
  • Multichannel Buffered Serial Port (McBSP)
    • I2S and TDM
    • AC97 Audio Codec Interface
    • SPI
    • Standard Voice Codec Interface (AIC12)
    • Telecom Interfaces - ST-Bus, H-100
    • 128 Channel Mode
  • Multichannel Audio Serial Port (McASP0)
    • Four Serializers and SPDIF (DIT) Mode
  • 16-Bit Host-Port Interface (HPI)
  • High-End CAN Controller (HECC)
  • 10/100 Mb/s Ethernet MAC (EMAC)
    • IEEE 802.3 Compliant
    • Supports Media Independent Interface (MII)
    • Management Data I/O (MDIO) Module
  • VLYNQ™ Interface (FPGA Interface)
  • Three Pulse Width Modulator (PWM) Outputs
  • On-Chip ROM Bootloader
  • Individual Power-Savings Modes
  • Flexible PLL Clock Generators
  • IEEE-1149.1 (JTAG™) Boundary-Scan-Compatible
  • Up to 111 General-Purpose I/O (GPIO) Pins (Multiplexed With Other Device Functions)
  • Packages:
    • 361-Pin Pb-Free PBGA Package (ZWT Suffix), 0.8-mm Ball Pitch
    • 376-Pin Plastic BGA Package (ZDU Suffix), 1.0-mm Ball Pitch
  • 0.09-µm/6-Level Cu Metal Process (CMOS)
  • 3.3-V and 1.8-V I/O, 1.2-V Internal (-7/-6/-5/-4/-L/-Q6/-5Q/-4Q)
  • 3.3-V and 1.8-V I/O, 1.05-V Internal (-7/-6/-5/-4/-L/-Q5)
  • Applications:
    • Digital Media
  • Networked Media Encode
  • Video Imaging

All trademarks are the property of their respective owners.

Description

The TMS320C64x+™ DSPs (including the TMS320DM6435 device) are the highest-performance fixed-point DSP generation in the TMS320C6000™ DSP platform. The DM6435 device is based on the third-generation high-performance, advanced VelociTI™ very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for digital media applications. The C64x+™ devices are upward code-compatible from previous devices that are part of the C6000™ DSP platform. The C64x™ DSPs support added functionality and have an expanded instruction set from previous devices.

Any reference to the C64x DSP or C64x CPU also applies, unless otherwise noted, to the C64x+ DSP and C64x+ CPU, respectively.

With performance of up to 4800 million instructions per second (MIPS) at a clock rate of 600 MHz, the C64x+ core offers solutions to high-performance DSP programming challenges. The DSP core possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. The C64x+ DSP core processor has 64 general-purpose registers of 32-bit word length and eight highly independent functional units–two multipliers for a 32-bit result and six arithmetic logic units (ALUs). The eight functional units include instructions to accelerate the performance in video and imaging applications. The DSP core can produce four 16-bit multiply-accumulates (MACs) per cycle for a total of 2400 million MACs per second (MMACS), or eight 8-bit MACs per cycle for a total of 4800 MMACS. For more details on the C64x+ DSP, see the TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide (literature number SPRU732).

The DM6435 also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals similar to the other C6000 DSP platform devices. The DM6435 core uses a two-level cache-based architecture. The Level 1 program memory/cache (L1P) consists of a 256K-bit memory space that can be configured as mapped memory or direct mapped cache, and the Level 1 data (L1D) consists of a 640K-bit memory space–384K-bit of which is mapped memory and 256K-bit of which can be configured as mapped memory or 2-way set-associative cache. The Level 2 memory/cache (L2) consists of a 1M-bit memory space that is shared between program and data space. L2 memory can be configured as mapped memory, cache, or combinations of the two.

The peripheral set includes: a configurable video port (VPFE); a 10/100 Mb/s Ethernet MAC (EMAC) with a management data input/output (MDIO) module; a 4-bit transmit, 4-bit receive VLYNQ interface; an inter-integrated circuit (I2C) Bus interface; a multichannel buffered serial port (McBSP); a multichannel audio serial port (McASP0) with 4 serializers; 2 64-bit general-purpose timers each configurable as 2 independent 32-bit timers; 1 64-bit watchdog timer; a user-configurable 16-bit host-port interface (HPI); up to 111-pins of general-purpose input/output (GPIO) with programmable interrupt/event generation modes, multiplexed with other peripherals; 2 UARTs with hardware handshaking support on 1 UART; 3 pulse width modulator (PWM) peripherals; 1 high-end controller area network (CAN) controller [HECC]; and 2 glueless external memory interfaces: an asynchronous external memory interface (EMIFA) for slower memories/peripherals, and a higher speed synchronous memory interface for DDR2.

The DM6435 device includes a Video Processing Subsystem (VPSS) with a configurable video/imaging front-end input peripheral used for video capture.

The Video Processing Front-End (VPFE) is comprised of a CCD Controller (CCDC), a Preview Engine (Previewer), Histogram Module, Auto-Exposure/White Balance/Focus Module (H3A), and Resizer. The CCDC is capable of interfacing to common video decoders, CMOS sensors, and Charge Coupled Devices (CCDs). The Previewer is a real-time image processing engine that takes raw imager data from a CMOS sensor or CCD and converts from an RGB Bayer Pattern to YUV422. The Histogram and H3A modules provide statistical information on the raw color data for use by the DM6435. The Resizer accepts image data for separate horizontal and vertical resizing from 1/4x to 4x in increments of 256/N, where N is between 64 and 1024.

The Ethernet Media Access Controller (EMAC) provides an efficient interface between the DM6435 and the network. The DM6435 EMAC support both 10Base-T and 100Base-TX, or 10 Mbits/second (Mbps) and 100 Mbps in either half- or full-duplex mode, with hardware flow control and quality of service (QOS) support.

The Management Data Input/Output (MDIO) module continuously polls all 32 MDIO addresses in order to enumerate all PHY devices in the system.

The I2C and VLYNQ ports allow DM6435 to easily control peripheral devices and/or communicate with host processors.

The high-end controller area network (CAN) controller [HECC] module provides a network protocol in a harsh environment to communicate serially with other controllers, typically in automotive applications.

The rich peripheral set provides the ability to control external peripheral devices and communicate with external processors. For details on each of the peripherals, see the related sections later in this document and the associated peripheral reference guides.

The DM6435 has a complete set of development tools. These include C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a Windows™ debugger interface for visibility into source code execution.

    

Pricing / Packaging / CAD Design Tools / Samples

PricePackagingCAD Design ToolsSamples
DeviceStatusTemp (oC)Price | QuantityPackage | PinsPackage QTY | Package CarrierSymbolsFootprintsSamples
TMS320DM6435ZDU6ACTIVE0 to 9020.60 | 100uBGA (ZDU) | 376 60  Purchase Samples
TMS320DM6435ZDU7ACTIVE 24.80 | 100uBGA (ZDU) | 376 60  Purchase Samples
TMS320DM6435ZDULACTIVE 24.80 | 100uBGA (ZDU) | 376 60  Purchase Samples
TMS320DM6435ZDUQ6ACTIVE 24.80 | 100uBGA (ZDU) | 376 60  Purchase Samples
TMS320DM6435ZWT4ACTIVE0 to 9017.45 | 100uNFBGA (ZWT) | 361 90 Download CAD Format for this Symbol Download CAD Format for this FootprintPurchase Samples
TMS320DM6435ZWT5ACTIVE0 to 9018.50 | 100uNFBGA (ZWT) | 361 90 Download CAD Format for this Symbol Download CAD Format for this FootprintPurchase Samples
TMS320DM6435ZWT6ACTIVE0 to 9020.60 | 100uNFBGA (ZWT) | 361 90 Download CAD Format for this Symbol Download CAD Format for this FootprintPurchase Samples
TMS320DM6435ZWT7ACTIVE 24.80 | 100uNFBGA (ZWT) | 361 90  Purchase Samples
TMS320DM6435ZWTLACTIVE 24.80 | 100uNFBGA (ZWT) | 361 90  Purchase Samples
TMS320DM6435ZWTQ4ACTIVE-40 to 12518.50 | 100uNFBGA (ZWT) | 361 90 Download CAD Format for this Symbol Download CAD Format for this FootprintPurchase Samples
TMS320DM6435ZWTQ5ACTIVE-40 to 12520.60 | 100uNFBGA (ZWT) | 361 90 Download CAD Format for this Symbol Download CAD Format for this FootprintPurchase Samples
TMS320DM6435ZWTQ6ACTIVE 24.80 | 100uNFBGA (ZWT) | 361 90  Purchase Samples

* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.

Inventory

Reported Distributor Inventory as of 10:14 AM GMT, 06 Nov 2009
RegionCompanyIn StockPurchase
TI Lead Time*: 6 WeeksTMS320DM6435ZDU6
WorldwideMouser Electronics 60
TI Lead Time*: 6 WeeksTMS320DM6435ZDU7
None Reported
View Distributors
TI Lead Time*: 20 WeeksTMS320DM6435ZDUL
None Reported
View Distributors
TI Lead Time*: 6 WeeksTMS320DM6435ZDUQ6
None Reported
View Distributors
TI Lead Time*: 19 WeeksTMS320DM6435ZWT4
WorldwideMouser Electronics 54
TI Lead Time*: 6 WeeksTMS320DM6435ZWT5
WorldwideMouser Electronics 48
TI Lead Time*: 20 WeeksTMS320DM6435ZWT6
EuropeAvnet-SILICA 69
WorldwideMouser Electronics 90
TI Lead Time*: 20 WeeksTMS320DM6435ZWT7
None Reported
View Distributors
TI Lead Time*: 6 WeeksTMS320DM6435ZWTL
None Reported
View Distributors
TI Lead Time*: 6 WeeksTMS320DM6435ZWTQ4
None Reported
View Distributors
TI Lead Time*: 20 WeeksTMS320DM6435ZWTQ5
None Reported
View Distributors
TI Lead Time*: 18 WeeksTMS320DM6435ZWTQ6
None Reported
View Distributors
View all Distributors  

** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.

Quality & Lead (Pb)-Free Data

 Product ContentDPPM / MTBF / FIT Rate
DeviceEco Plan* Lead / Ball FinishMSL Rating / Peak ReflowDetailsDetails
TMS320DM6435ZDU6 RoHS Compliant Green (RoHS & no Sb/Br) Call TI Level-3-260C-168 HRViewView
TMS320DM6435ZDU7 RoHS Compliant Green (RoHS & no Sb/Br) SNAGCU Level-3-260C-168 HRViewView
TMS320DM6435ZDUL RoHS Compliant Green (RoHS & no Sb/Br) SNAGCU Level-3-260C-168 HRViewView
TMS320DM6435ZDUQ6 RoHS Compliant Green (RoHS & no Sb/Br) SNAGCU Level-3-260C-168 HRViewView
TMS320DM6435ZWT4 RoHS Compliant Pb-Free (RoHS) SNAGCU Level-3-260C-168 HRViewView
TMS320DM6435ZWT5 RoHS Compliant Pb-Free (RoHS) SNAGCU Level-3-260C-168 HRViewView
TMS320DM6435ZWT6 RoHS Compliant Pb-Free (RoHS) SNAGCU Level-3-260C-168 HRViewView
TMS320DM6435ZWT7 RoHS Compliant Pb-Free (RoHS) SNAGCU Level-3-260C-168 HRViewView
TMS320DM6435ZWTL RoHS Compliant Pb-Free (RoHS) SNAGCU Level-3-260C-168 HRViewView
TMS320DM6435ZWTQ4 RoHS Compliant Pb-Free (RoHS) SNAGCU Level-3-260C-168 HRViewView
TMS320DM6435ZWTQ5 RoHS Compliant Pb-Free (RoHS) SNAGCU Level-3-260C-168 HRViewView
TMS320DM6435ZWTQ6 RoHS Compliant Pb-Free (RoHS) SNAGCU Level-3-260C-168 HRViewView

* The planned eco-friendly classification: Pb-Free (RoHS) or Pb-Free (RoHS Exempt) or Green (RoHS & no Sb/Br) - please click on the Product Content Details "View" link in the table above for the latest availability information and additional product content details.

If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.

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Errata

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Tools & Software

NamePart # Company Tool / Software Type
Code Composer Studio Integrated Development Environment (IDE) - v4.xCCSTUDIOTexas InstrumentsCode Composer Studio(TM) IDE
DM6446 Digital Video Evaluation ModuleTMDSEVM6446Texas InstrumentsDevelopment Boards/EVMs
DM6437 Digital Video Development PlatformTMDSVDP6437Texas InstrumentsDevelopment Platforms
XDS510 Class EmulatorsXDS510Texas InstrumentsEmulators/Analyzers
Blackhawk™ LAN560 JTAG EmulatorBlackhawkEmulators/Analyzers
Blackhawk™ PCI560 JTAG Emulator for TI DSPsBlackhawkEmulators/Analyzers
Blackhawk™ USB560 JTAG EmulatorBlackhawkEmulators/Analyzers
Blackhawk™ USB560BP JTAG EmulatorBlackhawkEmulators/Analyzers
JTAGjet USB 2.0 Emulator for TMS320Signum SystemsEmulators/Analyzers
XDS510PP PLUS JTAG EmulatorSpectrum Digital, Inc.Emulators/Analyzers
XDS510USB JTAG EmulatorSpectrum Digital, Inc.Emulators/Analyzers
XDS510USB PLUS JTAG EmulatorSpectrum Digital, Inc.Emulators/Analyzers
H.264 Video EncoderTMDH264E Texas Instruments Algorithms / Codecs 
JPEG Imaging DecoderTMDJPEGD Texas Instruments Algorithms / Codecs 
MPEG-4 Video DecoderTMDMPEG4D Texas Instruments Algorithms / Codecs 
C64x+ IQMath Library - A Virtual Floating Point EngineSPRC542 Texas Instruments Signal Processing Libraries 
Linux Digital Video Software Development Kits (DVSDK) for DaVinci DevicesLINUXDVSDK-DV Texas Instruments Operating Systems (OS/RTOS) 
MPEG-2 Video DecoderTMDMPEG2D Texas Instruments Algorithms / Codecs 
MPEG-4 Video EncoderTMDMPEG4E Texas Instruments Algorithms / Codecs 
C62x/C64x Fast Run-Time Support (RTS) LibrarySPRC122 Texas Instruments Signal Processing Libraries 
C64x+ Image Library (IMGLIB)SPRC264 Texas Instruments Signal Processing Libraries 
H.264 Video DecoderTMDH264D Texas Instruments Algorithms / Codecs 
MP3 Audio EncoderTMDMP3E Texas Instruments Algorithms / Codecs 
JPEG Imaging EncoderTMDJPEGE Texas Instruments Algorithms / Codecs 
eXpressDSP Algorithm Standard – xDAIS Developer’s Kit and xDMTMDXDAISXDM Texas Instruments Algorithms / Codecs 
Multimedia Framework Products (MFP) - Codec Engine and xDAIS Framework ComponentsTMDMFP Texas Instruments Framework Software 

Simulation Models

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