TMS320DM648, Status:ACTIVE
Digital Media Processor
 
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Product Features and DescriptionFeaturesRequest Free SamplesSamplesTechnical Documents: app notes, user guides, models, and product bulletinsTechnical Documents
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related productsRelated ProductsInventory, Leadtime, and AvailabilityInventoryModels: BSDL, IBIS, or SPICESimulation Models
Tools & Software: EVMs, CCStudio, and developerTools & Software Download CAD Design ToolsSymbols/FootprintsAccess Reference DesignsReference Designs

 Datasheet
Download Datasheet
TMS320DM647/TMS320DM648 Digital Media Processors (Rev. B) (tms320dm648.pdf, 1806 KB)
30 Apr 2008 Download
TMS320DM647, TMS320DM648 Digital Media Processors Silicon Errata (Rev. C) (sprz263c.pdf, 202 KB)
30 Apr 2008 Download

TMS320DM648-720TMS320DM648-900
CPU1 C64x+; DaVinci Video  1 C64x+; DaVinci Video  
Peak MMACS5760  7200  
Frequency(MHz)720  900  
On-Chip L1/SRAM64 KB  64 KB  
On-Chip L2/SRAM512 KB  512 KB  
ROM64 KB  64 KB  
EMIF1 32-Bit DDR2,1 16-Bit EMIFA  1 32-Bit DDR2,1 16-Bit EMIFA  
External Memory Type SupportedAsync SRAM,DDR2,SDRAM,SBSRAM  Async SRAM,DDR2,SDRAM,SBSRAM  
DMA64-Ch EDMA  64-Ch EDMA  
Video Port (Configurable)5 16-Bit Dual-Ch  5 16-Bit Dual-Ch  
VIC1  1  
Ethernet Switch Subsystem10/100/1000, 2 SGMII PORT  10/100/1000, 2 SGMII PORT  
PCI1 32-Bit [66 MHz]  1 32-Bit [66 MHz]  
HPI1 32/16-Bit  1 32/16-Bit  
I2C1  1  
McASP1  1  
Trace EnabledYes  Yes  
Timers4 64-Bit GP  4 64-Bit GP  
Hardware AcceleratorsVICP  VICP  
Core Supply (Volts)1.2 V  1.2 V  
IO Supply (Volts)3.3 V,1.8V  3.3 V,1.8V  
Operating Temperature Range (°C)0 to 90  0 to 90  
 SamplesSamples
 InventoryInventory

Product Information
Back to TopFeatures
  • High-Performance Digital Media Processor (DM647/DM648)
    • 720, 900-MHz C64x+™ Clock Rate
    • 1.39, 1.11-ns Instruction Cycle Time
    • 5760, 7200 MIPS
    • Eight 32-Bit C64x+ Instructions/Cycle
    • Fully Software-Compatible With C64x/Debug
    • Commercial Temperature Ranges
  • VelociTI.2™ Extensions to VelociTI™ Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x+™ DSP Core
    • Eight Highly Independent Functional Units With VelociTI.2 Extensions:
      • Six ALUs (32-/40-Bit), Each Supports Single 32-bit, Dual 16-bit, or Quad 8-bit Arithmetic per Clock Cycle
      • Two Multipliers Support Four 16 x 16-bit Multiplies (32-bit Results) per Clock Cycle or Eight 8 x 8-bit Multiplies (16-Bit Results) per Clock Cycle
    • Load-Store Architecture With Non-Aligned Support
    • 64 32-bit General-Purpose Registers
    • Instruction Packing Reduces Code Size
    • All Instructions Conditional
    • Additional C64x+™ Enhancements
      • Protected Mode Operation
      • Exceptions Support for Error Detection and Program Redirection
      • Hardware Support for Modulo Loop Auto-Focus Module Operation
  • C64x+ Instruction Set Features
    • Byte-Addressable (8-/16-/32-/64-bit Data)
    • 8-bit Overflow Protection
    • Bit-Field Extract, Set, Clear
    • Normalization, Saturation, Bit-Counting
    • VelociTI.2 Increased Orthogonality
    • C64x+ Extensions
      • Compact 16-bit Instructions
      • Additional Instructions to Support Complex Multiplies
  • C64x+ L1/L2 Memory Architecture
    • 256K-bit (32K-byte) L1P Program Cache [Direct Mapped]
    • 256K-bit (32K-byte) L1D Data Cache [2-Way Set-Associative]
    • 2M-bit/256K-byte (DM647) or 4M-Bit/512K-byte) (DM648) L2 Unified Mapped RAM/Cache [Flexible Allocation]
  • Supports Little Endian Mode Only
  • Five Configurable Video Ports
    • Providing a Glueless I/F to Common Video Decoder and Encoder Devices
    • Supports Multiple Resolutions/Video Stds
  • VCXO Interpolated Control Port (VIC)
    • Supports Audio/Video Synchronization
  • External Memory Interfaces (EMIFs)
    • 32-Bit DDR2 SDRAM Memory Controller With 512M-Byte(1) Address Space (1.8-V I/O)
    • Asynchronous 16-Bit Wide EMIF (EMIFA)
      • Up to 128M-Byte Total Address Reach
      • 64M-Byte Address Reach per CE Space
    • Glueless Interface to Asynchronous Memories (SRAM, Flash, and EEPROM)
    • Synchronous Memories (SBSRAM and ZBT SRAM)
    • Supports Interface to Standard Sync Devices and Custom Logic (FPGA, CPLD, ASICs, etc)
  • Enhanced Direct-Memory-Access (EDMA) Controller (64 Independent Channels)
  • 3-Port Gigabit Ethernet Switch
  • Four 64-Bit General-Purpose Timers (Each Configurable as Two 32-Bit Timers)
  • One UART (With RTS and CTS Flow Control)
  • One 4-wire Serial Port Interface (SPI) With Two Chip-Selects
  • Master/Slave Inter-Integrated Circuit (I2C Bus™)
  • Multichannel Audio Serial Port (McASP)
    • Ten Serializers and SPDIF (DIT) Mode
  • 16/32-Bit Host-Port Interface (HPI)
  • Advanced Event Triggering (AET) Compatible
  • 32-Bit 33-/66-MHz, 3.3-V Peripheral Component Interconnect (PCI) Master/Slave Interface Conforms to PCI Specification 2.3
  • VLYNQ™ Interface (FPGA Interface)
  • On-Chip ROM Bootloader
  • Individual Power-Saving Modes
  • Flexible PLL Clock Generators
  • IEEE-1149.1 (JTAG™) Boundary-Scan-Compatible
  • 32 General-Purpose I/O (GPIO) Pins (Multiplexed With Other Device Functions)
  • Package:
    • 529-pin nFBGA (ZUT suffix)
    • 19x19 mm 0.8 mm pitch BGA
    • 0.09-µm/6-Level Cu Metal Process (CMOS)
  • 3.3-V and 1.8-V I/O, 1.2-V Internal (-720, -900)
  • Applications:
    • Digital Video Recording

(1)From Silicon revision 1.1 and onward. In silicon revision 1.0, the address space in bytes are 256M.

TMS320C64x+, C64x, C64x+, VelociTI, VelociTI.2, VLYNQ, TMS320C6000, C6000, TI, and TMS320 are trademarks of Texas Instruments.
I2C Bus is a registered trademark of Koninklijke Philips Electronics N.V.
Windows is a registered trademark of Microsoft Corporation in the United States and/or other countries.
All trademarks are the property of their respective owners.

Back to TopDescription

The TMS320C64x+™ DSPs (including the TMS320DM647/TMS320DM648 device) are the highest-performance fixed-point DSP generation in the TMS320C6000™ DSP platform. The DM647/DM648 devices are based on the third-generation high-performance, advanced VelociTI™ very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for digital media applications. The C64x+™ devices are upward code-compatible from previous devices that are part of the C6000™ DSP platform. The C64x™ DSPs support added functionality and have an expanded instruction set from previous devices.

Any reference to the C64x DSP or C64x CPU also applies, unless otherwise noted, to the C64x+ DSP and C64x+ CPU, respectively.

With performance of up to 7200 million instructions per second (MIPS) at a clock rate of 900 MHz, the C64x+ core offers solutions to high-performance DSP programming challenges. The DSP core possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. The C64x+ DSP core processor has 64 general-purpose registers of 32-bit word length and eight highly independent functional units-two multipliers for a 32-bit result and six arithmetic logic units (ALUs). The eight functional units include instructions to accelerate the performance in video and imaging applications. The DSP core can produce four 16-bit multiply-accumulates (MACs) per cycle for a total of 2400 million MACs per second (MMACS), or eight 8-bit MACs per cycle for a total of 4800 MMACS. For more details on the C64x+ DSP, see the TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide (literature number SPRU732).

The DM647/DM648 devices also have application-specific hardware logic, on-chip memory, and additional on-chip peripherals similar to the other C6000 DSP platform devices. The DM647/DM648 core uses a two-level cache-based architecture. The Level 1 program cache (L1P) is a 256K-bit direct mapped cache and the Level 1 data cache (L1D) is a 256K-bit 2-way set-associative cache. The Level 2 memory/cache (L2) consists of a 4M-bit (DM648) or 2M-bit (DM647) memory space that is shared between program and data space. L2 memory can be configured as mapped memory, cache, or combinations of the two.

The peripheral set includes: The DM647/DM648 device has five configurable 16-bit video port peripherals (VP0, VP1, VP2, VP3, and VP4). These video port peripherals provide a glueless interface to common video decoder and encoder devices. The DM647/DM648 video port peripherals support multiple resolutions and video standards (e.g., CCIR601, ITU-BT.656, BT.1120, SMPTE 125M, 260M, 274M, and 296M), a VCXO interpolated control port (VIC); a 1000 Mbps Ethernet Switch Subsystem with a management data input/output (MDIO) module and two SGMII ports (DM648 only) or one SGMII port (only DM647); a 4-bit transmit, 4-bit receive VLYNQ interface; an inter-integrated circuit (I2C) bus interface; a multichannel audio serial port (McASP) with ten serializers; four 64-bit general-purpose timers each configurable as two independent 32-bit timers; a user-configurable 16-bit or 32-bit host-port interface (HPI); 32 pins for general-purpose input/output (GPIO) with programmable interrupt/event generation modes, multiplexed with other peripherals; one UART; and two glueless external memory interfaces: a synchronous and asynchronous external memory interface (EMIFA) for slower memories/peripherals, and a higher DDR2 SDRAM interface.

The video port peripherals provide a glueless interface to common video decoder and encoder devices. The video port peripherals support multiple resolutions and video standards (e.g., CCIR601, ITU-BT.656, BT.1120, SMPTE 125M, 260M, 274M, and 296M).

The video port peripherals are configurable and can support either video capture and/or video display modes. Each video port consists of two channels (A and B) with a 5120-byte capture/display buffer that is splittable between the two channels.

For more details on the video port peripherals, see the TMS320DM647/DM648 Video Port User's Guide (literature number SPRUEM1).

The management data input/output (MDIO) module continuously polls all 32 MDIO addresses to enumerate all PHY devices in the system.

The I2C and VLYNQ ports allow the device to easily control peripheral modules and/or communicate with host processors.

The rich peripheral set provides the ability to control external peripheral devices and communicate with external processors. For details on each of the peripherals, see the related sections later in this document and the associated peripheral reference guides.

The DM647/DM648 devices have a complete set of development tools. These include C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a Windows™ debugger interface for visibility into source code execution.

Benchmarks
DaVinci Processor Overview
DaVinci Product Bulletin

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Pricing/Packaging/CAD Design Tools/Samples
Back to TopPricePackagingCAD Design ToolsSamples
DeviceStatusBudget Price
($US) | QTY
Industry Standard
(TI Pkg)
| Pins
Standard Pack Quantity | Package CarrierSymbolsFootprintsSamples
TMS320DM648ZUT7ACTIVE65.60 | 100uFCBGA (ZUT) | 529 84  Purchase Samples
TMS320DM648ZUT9ACTIVE86.60 | 100uFCBGA (ZUT) | 529 84  Purchase Samples
TMX320DM648ZUT7ACTIVE78.70 | 100uFCBGA (ZUT) | 529   Download CAD Format for this Symbol Download CAD Format for this FootprintPurchase Samples
TMX320DM648ZUT9ACTIVE103.90 | 100uFCBGA (ZUT) | 529   Download CAD Format for this Symbol Download CAD Format for this FootprintPurchase Samples

* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.


Inventory
Back to TopTI Inventory StatusReported Distributor Inventory
TMX320DM648ZUT7As of 8:03 AM GMT, 16 May 2008As of 8:03 AM GMT, 16 May 2008
 In StockIn Progress QTY | DateLead TimeRegionCompanyIn StockPurchase
 0*  Call**AmericasAvnet 58 Buy Now
  Rochester Electronics 168 Buy Now
View all Distributors
 
* Our information is updated daily, so please check back with us soon if this does not meet your needs. You may also contact your TI Authorized Distributor , including those listed above, for real time stock information.** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information. 

Quality & Lead (Pb)-Free Data
Back to TopProduct ContentDPPM / MTBF / FIT Rate
DeviceEco Plan* Lead / Ball FinishMSL Rating / Peak ReflowDetailsDetails
TMS320DM648ZUT7  Pb-Free (RoHS Exempt) Call TI Level-4-245C-72HRViewView
TMS320DM648ZUT9  Pb-Free (RoHS Exempt) SNAGCU Level-4-245C-72HRViewView
TMX320DM648ZUT7      View
TMX320DM648ZUT9      View
* The planned eco-friendly classification: Pb-Free (RoHS) or Pb-Free (RoHS Exempt) or Green (RoHS & no Sb/Br) - please click on the Product Content Details "View" link in the table above for the latest availability information and additional product content details. If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.


Technical Documents
Back to TopDatasheets
TMS320DM647/TMS320DM648 Digital Media Processors (Rev. B) (tms320dm648.pdf, 1806 KB)
30 Apr 2008 Download
TMS320DM647, TMS320DM648 Digital Media Processors Silicon Errata (Rev. C) (sprz263c.pdf, 202 KB)
30 Apr 2008 Download
Back to TopApplication Notes
TMS320DM647/8 Power Consumption Summary (spraar5.htm, 8 KB)
24 Mar 2008 Abstract
Using the TMS320DM647/DM648 Bootloader (Rev. B) (spraaj1b.htm, 10 KB)
29 Jan 2008 Abstract
EDMA v2.0 to EDMA v3.0 (EDMA3) Migration Guide (spraap4.htm, 8 KB)
11 Dec 2007 Abstract
Migrating from TMS320DM642/3/1/0 to the TMS320DM647/DM648 Device (spraam5.htm, 8 KB)
07 Jun 2007 Abstract
Thermal Considerations for the DM64xx, DM64x, and C6000 Devices (spraal9.htm, 8 KB)
20 May 2007 Abstract
Implementing DDR2 PCB Layout on the TMS320DM647/DM648 DMSoC (spraak9.htm, 8 KB)
20 May 2007 Abstract
nFBGA Packaging Application Report (spraa99.htm, 8 KB)
13 Mar 2007 Abstract
Implementing DDR2 PCB Layout on the TMS320C6455/C6454 (Rev. D) (spraaa7d.htm, 9 KB)
20 Dec 2006 Abstract
View Application Notes for TMS320DM64x DSPs
Back to TopUser Guides
TMS320C6000 DSP Peripherals Overview Reference Guide (Rev. O) (spru190o.htm, 8 KB)
03 Dec 2007 Abstract
TMS320DM647/DM648 DSP Universal Asynchronous Receiver/Transmitter (UART) UG (Rev. A) (spruel8a.htm, 8 KB)
02 Oct 2007 Abstract
TMS320DM647/DM648 DSP Host Port Interface (HPI) User's Guide (Rev. A) (spruel5a.htm, 8 KB)
02 Oct 2007 Abstract
TMS320DM647DM648 DSP 64-Bit Timer User's Guide (Rev. A) (spruel0a.htm, 8 KB)
02 Oct 2007 Abstract
TMS320DM647/DM648 DSP Inter-Integrated Circuit (I2C) Module User's Guide (Rev. B) (spruek8b.htm, 8 KB)
02 Oct 2007 Abstract
TMS320DM647/DM648 DSP General-Purpose Input/Output (GPIO) User's Guide (Rev. A) (spruek7a.htm, 8 KB)
02 Oct 2007 Abstract
TMS320DM647/DM648 DSP Serial Peripheral Interface (SPI) User’s Guide (Rev. A) (spruem2a.htm, 8 KB)
02 Oct 2007 Abstract
TMS320DM647/DM648 DSP External Memory Interface (EMIF) User's Guide (Rev. B) (spruek6b.htm, 8 KB)
02 Oct 2007 Abstract
TMS320DM647/DM648 DSP Enhanced DMA (EDMA3) Controller User's Guide (Rev. A) (spruel2a.htm, 8 KB)
02 Oct 2007 Abstract
TMS320DM647/DM648 DSP Multichannel Audio Serial Port (McASP) User's Guide (Rev. A) (spruel1a.htm, 8 KB)
02 Oct 2007 Abstract
TMS320DM647/DM648 DSP DDR2 Memory Controller User's Guide (Rev. A) (spruek5a.htm, 8 KB)
02 Oct 2007 Abstract
TMS320DM647/DM648 DSP Subsystem User's Guide (sprueu6.htm, 8 KB)
28 Sep 2007 Abstract
TMS320DM647/DM648 DSP 3 Port Switch (3PSW) Ethernet Subsystem User's Guide (spruf57.htm, 8 KB)
07 Sep 2007 Abstract
TMS320DM647/DM648 DSP VLYNQ Port User's Guide (spruel9.htm, 8 KB)
05 Jun 2007 Abstract
TMS320DM647/DM648 DSP Video Port/VCXO Interpolated Control (VIC) Port UG (spruem1.htm, 8 KB)
24 May 2007 Abstract
TMS320DM647/DM648 DSP Peripheral Component Interconnect (PCI) User’s Guide (spruel4.htm, 8 KB)
20 May 2007 Abstract
View User Guides for TMS320DM64x DSPs
Back to TopSimulation Models
IBIS Model
DM647/DM648 ZUT IBIS Model (sprm257.ibs, 2144 KB)
27 Jul 2007 ibis /  zip
BSDL Model
DM647/DM648 ZUT BSDL Model (sprm256.zip, 11 KB)
27 Jul 2007 zip
View Simulation Models for TMS320DM64x DSPs
Back to TopWhite Papers
View White Papers for TMS320DM64x DSPs
Back to TopMore Literature
12Vin Power Design using Integrated-FET DCDC Converters and a LDO (slvr329.pdf, 931 KB)
26 Mar 2008 Download
5Vin Power Design using Integrated-FET DCDC Converters and a LDO (slvr328.pdf, 937 KB)
26 Mar 2008 Download
DaVinci Technology Overview Brochure (Rev. A) (sprb189a.pdf, 1121 KB)
03 Dec 2007 Download
DaVinci Newsletter - Fall 2007 Issue (Rev. B) (sprn247b.pdf, 362 KB)
14 Aug 2007 Download
View More Literature for TMS320DM64x DSPs

Tools & Software
Back to Top Name Part # Company Tool / Software Type
Code Composer Studio IDECCSTUDIOTexas InstrumentsCode Composer Studio(TM) IDE
DM642 Evaluation ModuleTMDSEVM642Texas InstrumentsDevelopment Boards/EVMs
SMT8039 Video & Imaging Kit for the TMS320DM642Sundance Multiprocessor Technology LTDDevelopment Boards/EVMs
DaVinci™ Prototyping Board (DVPB)eInfochipsDevelopment Boards/EVMs
DM648 Digital Video Development PlatformTMDXDVP648Texas InstrumentsDevelopment Platforms
DM64x Digital Media Developer's Kit with NTSC CameraTMDSDMK642Texas InstrumentsDevelopment Platforms
Network and Video Development KitTMDX3PNV6416STexas InstrumentsDevelopment Platforms
XDS560 Trace EmulatorXDS560TRACETexas InstrumentsEmulators/Analyzers
XDS510USB PLUS JTAG EmulatorSpectrum Digital, Inc.Emulators/Analyzers
FlashBurn Porting KitTMDSSDSFBPKTexas InstrumentsFlash Tools
C64x+IMGLIBSPRC264 Texas Instruments Signal Processing Libraries 
C64x+ IQMath Library - A Virtual Floating Point EngineSPRC542 Texas Instruments Signal Processing Libraries 
Network Developer's Kit (NDK) TCP/IP StackTMDSNDK Texas Instruments Drivers / IO / Control Software 
MP3 Audio EncoderTMDMP3E Texas Instruments Algorithms / Codecs 
VirtualLogix™ VLX for Digital Multimedia VirtualLogix Operating Systems (OS/RTOS) 

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Part #NameProduct FamilyComments
TMS320DM6467Digital Media System-on-ChipDAVINCI DIGITAL MEDIA PROCESSORS-TMS320DM646x DSPsTI customers also evaluated this product.
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