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TMS320VC5501 Status: ACTIVE

Fixed-Point Digital Signal Processor


      
         
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Functional Block Diagram


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 TMS320VC5501-300
CPU1 C55x  
Peak MMACS600  
Frequency(MHz)300  
RAM32 KB  
ROM32 KB  
On-Chip L1/SRAM16 KB  
EMIF1 32-Bit  
External Memory Type SupportedAsync SRAM,SBSRAM,SDRAM  
DMA6-Ch  
HPI1 8-Bit HPI  
McBSP2  
I2C1  
UART1  
Timers2 64-Bit GP,1 WD  
Boot Loader AvailableYes  
Core Supply (Volts)1.26 V  
IO Supply (Volts)3.3 V  
Operating Temperature Range (°C)-40 to 85  
RatingCatalog  
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Product Information

Features

  • High-Performance, Low-Power, Fixed-Point TMS320C55x™ Digital Signal Processor (DSP)
    • 3.33-ns Instruction Cycle Time for 300-MHz Clock Rate
    • 16K-Byte Instruction Cache (I-Cache)
    • One/Two Instructions Executed per Cycle
    • Dual Multipliers [Up to 600 Million Multiply-Accumulates Per Second (MMACS)]
    • Two Arithmetic/Logic Units (ALUs)
    • One Program Bus, Three Internal Data/Operand Read Buses, and Two Internal Data/Operand Write Buses
  • Instruction Cache (16K Bytes)
  • 16K × 16-Bit On-Chip RAM That is Composed of Four Blocks of 4K × 16-Bit Dual-Access RAM (DARAM) (32K Bytes)
  • 16K × 16-Bit One-Wait-State On-Chip ROM (32K Bytes)
  • 8M × 16-Bit Maximum Addressable External Memory Space
  • 32-Bit External Parallel Bus Memory Supporting External Memory Interface (EMIF) With General-Purpose Input/Output (GPIO) Capabilities and Glueless Interface to:
    • Asynchronous Static RAM (SRAM)
    • Asynchronous EPROM
    • Synchronous DRAM (SDRAM)
    • Synchronous Burst RAM (SBRAM)
  • Emulation/Debug Trace Capability Saves Last 16 Program Counter (PC) Discontinuities and Last 32 PC Values
  • Programmable Low-Power Control of Six Device Functional Domains
  • On-Chip Peripherals
    • Six-Channel Direct Memory Access (DMA) Controller
    • Two Multichannel Buffered Serial Ports (McBSPs)
    • Programmable Analog Phase-Locked Loop (APLL) Clock Generator
    • General-Purpose I/O (GPIO) Pins and a Dedicated Output Pin (XF)
    • 8-Bit Parallel Host-Port Interface (HPI)
    • Four Timers
      • Two 64-Bit General-Purpose Timers
      • 64-Bit Programmable Watchdog Timer
      • 64-Bit DSP/BIOS™ Counter
    • Inter-Integrated Circuit (I2C) Interface
    • Universal Asynchronous Receiver/ Transmitter (UART)
  • On-Chip Scan-Based Emulation Logic
  • IEEE Std 1149.1(1) (JTAG) Boundary Scan Logic
  • Packages:
    • 176-Terminal LQFP (Low-Profile Quad Flatpack) (PGF Suffix)
    • 201-Terminal MicroStar BGA™ (Ball Grid Array) (GZZ and ZZZ Suffixes)
  • 3.3-V I/O Supply Voltage
  • 1.26-V Core Supply Voltage

TMS320C55x, DSP/BIOS, and MicroStar BGA are trademarks of Texas Instruments.
C55x, eXpressDSP, Code Composer Studio, RTDX, and XDS510 are trademarks of Texas Instruments.
All trademarks are the property of their respective owners.
(1)IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.
NOTE: This document is designed to be used in conjunction with the TMS320C55x DSP CPU Reference Guide (literature number SPRU371).

Description

The TMS320VC5501 (5501) fixed-point digital signal processor (DSP) is based on the TMS320C55x™ DSP generation CPU processor core. The C55x™ DSP architecture achieves high performance and low power through increased parallelism and total focus on reduction in power dissipation. The CPU supports an internal bus structure that is composed of one program bus, three data read buses, two data write buses, and additional buses dedicated to peripheral and DMA activity. These buses provide the ability to perform up to three data reads and two data writes in a single cycle. In parallel, the DMA controller can perform data transfers independent of the CPU activity.

The C55x™ CPU provides two multiply-accumulate (MAC) units, each capable of 17-bit × 17-bit multiplication in a single cycle. A central 40-bit arithmetic/logic unit (ALU) is supported by an additional 16-bit ALU. Use of the ALUs is under instruction set control, providing the ability to optimize parallel activity and power consumption. These resources are managed in the Address Unit (AU) and Data Unit (DU) of the C55x CPU.

The C55x DSP generation supports a variable byte width instruction set for improved code density. The Instruction Unit (IU) performs 32-bit program fetches from internal or external memory and queues instructions for the Program Unit (PU). The Program Unit decodes the instructions, directs tasks to AU and DU resources, and manages the fully protected pipeline. Predictive branching capability avoids pipeline flushes on execution of conditional instructions.

The 5501 peripheral set includes an external memory interface (EMIF) that provides glueless access to asynchronous memories like EPROM and SRAM, as well as to high-speed, high-density memories such as synchronous DRAM and synchronous burst RAM. Additional peripherals include UART, watchdog timer, and an I-Cache. Two full-duplex multichannel buffered serial ports (McBSPs) provide glueless interface to a variety of industry-standard serial devices, and multichannel communication with up to 128 separately enabled channels. The host-port interface (HPI) is an 8-bit parallel interface used to provide host processor access to 16K words of internal memory on the 5501. The HPI operates in multiplexed mode to provide glueless interface to a wide variety of host processors. The DMA controller provides data movement for six independent channel contexts without CPU intervention. Two general-purpose timers, eight dedicated general-purpose I/O (GPIO) pins, and analog phase-locked loop (APLL) clock generation are also included.

The 5501 is supported by the industry's award-winning eXpressDSP™, Code Composer Studio™ Integrated Development Environment (IDE), DSP/BIOS™, Texas Instruments' algorithm standard, and the industry's largest third-party network. The Code Composer Studio× IDE features code generation tools that include a C Compiler, Visual Linker, simulator, RTDX™, XDS510™ emulation device drivers, and evaluation modules. The 5501 is also supported by the C55x™ DSP Library, which features more than 50 foundational software kernels (FIR filters, IIR filters, FFTs, and various math functions) as well as chip and board support libraries.

    

Pricing / Packaging / CAD Design Tools / Samples

PricePackagingCAD Design ToolsSamples
DeviceStatusPrice | QuantityPackage | PinsPackage QTY | Package CarrierSymbolsFootprintsSamples
TMS320VC5501GZZ300ACTIVE5.00 | 100uBGA MICROSTAR (GZZ) | 201 126 Download CAD Format for this Symbol Download CAD Format for this Footprint
TMS320VC5501PGF300ACTIVE5.00 | 100uLQFP (PGF) | 176 40 Download CAD Format for this Symbol Download CAD Format for this Footprint
TMS320VC5501ZZZ300ACTIVE5.00 | 100uBGA MICROSTAR (ZZZ) | 201 126 Download CAD Format for this Symbol Download CAD Format for this FootprintPurchase Samples
TMX320VC5501GZZ300OBSOLETE BGA MICROSTAR (GZZ) | 201   Download CAD Format for this Symbol Not Available
TMX320VC5501PGF300OBSOLETE LQFP (PGF) | 176   Download CAD Format for this Symbol Download CAD Format for this FootprintNot Available

* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.

Inventory

Reported Distributor Inventory as of 10:13 AM GMT, 06 Nov 2009
RegionCompanyIn StockPurchase
TI Lead Time*: 20 WeeksTMS320VC5501GZZ300
AmericasAvnet 1
Rochester Electronics >1k
AsiaWPI 164
WorldwideDigiKey >1k
TI Lead Time*: 18 WeeksTMS320VC5501PGF300
AmericasNewark 3
AsiaFarnell Asia 10
WPI 73
EuropeFarnell 10
TI Lead Time*: 18 WeeksTMS320VC5501ZZZ300
AmericasRochester Electronics >1k
EuropeAvnet-SILICA 36
View all Distributors  

** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.

Quality & Lead (Pb)-Free Data

 Product ContentDPPM / MTBF / FIT Rate
DeviceEco Plan* Lead / Ball FinishMSL Rating / Peak ReflowDetailsDetails
TMS320VC5501GZZ300  TBD SNPB Level-3-220C-168 HRViewView
TMS320VC5501PGF300 RoHS Compliant Green (RoHS & no Sb/Br) CU NIPDAU Level-4-260C-72 HRViewView
TMS320VC5501ZZZ300 RoHS Compliant Green (RoHS & no Sb/Br) SNAGCU Level-3-260C-168 HRViewView

* The planned eco-friendly classification: Pb-Free (RoHS) or Pb-Free (RoHS Exempt) or Green (RoHS & no Sb/Br) - please click on the Product Content Details "View" link in the table above for the latest availability information and additional product content details.

If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.

Technical Documents

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Datasheet

Application Notes

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User Guides

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Errata

Tools & Software

NamePart # Company Tool / Software Type
Code Composer Studio IDE Subscription Service for v3.3CCSTUDIOSUBSCRIPTIONSTexas InstrumentsCode Composer Studio(TM) IDE
Code Composer Studio Integrated Development Environment (IDE) - v4.xCCSTUDIOTexas InstrumentsCode Composer Studio(TM) IDE
TMS320VC5505 DSP Evaluation ModuleTMDXEVM5505Texas InstrumentsDevelopment Boards/EVMs
Q-VGA LCD Module for OMAP5912Mistral Solutions Pvt. LtdDevelopment Boards/EVMs
XDS510 Class EmulatorsXDS510Texas InstrumentsEmulators/Analyzers
XDS560 Class High Speed EmulatorsXDS560Texas InstrumentsEmulators/Analyzers
Blackhawk™ LAN560 JTAG EmulatorBlackhawkEmulators/Analyzers
Blackhawk™ PCI560 JTAG Emulator for TI DSPsBlackhawkEmulators/Analyzers
Blackhawk™ USB560BP JTAG EmulatorBlackhawkEmulators/Analyzers
JTAGjet USB 2.0 Emulator for TMS320Signum SystemsEmulators/Analyzers
XDS510PP PLUS JTAG EmulatorSpectrum Digital, Inc.Emulators/Analyzers
XDS510USB JTAG EmulatorSpectrum Digital, Inc.Emulators/Analyzers
XDS510USB PLUS JTAG EmulatorSpectrum Digital, Inc.Emulators/Analyzers
TMS320VC5509A DSP Starter Kit (DSK)TMDSDSK5509Texas InstrumentsStarter Kits
TMS320VC5510 DSP Starter Kit (DSK)TMDSDSK5510Texas InstrumentsStarter Kits
TMS320C55x DSP LibrarySPRC100 Texas Instruments Signal Processing Libraries 
TMS320C55x Chip Support Libraries (CSL) – Standard and Low-PowerSPRC133 Texas Instruments Application Software 
TMS320C55x Image LibrarySPRC101 Texas Instruments Signal Processing Libraries 
DSP/BIOS Real-Time KernelDSPBIOS Texas Instruments Operating Systems (OS/RTOS) 

Simulation Models

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