TMS470R1VC002 Status: ACTIVE

16/32-Bit RISC ROM Microcontroller

      
         
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Datasheet

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  • TMS470R1VC002 16/32-Bit RISC ROM Microcontroller (Rev. B) (tms470r1vc002.pdf, 452 KB)
    07 Oct 2002 Download

 TMS470R1VC002
Frequency(MHz)20  
ROM32 KB  
RAM2.5 KB  
Timer (# of Ch.)16  
SPI1  
GPIO44  
IO Supply (Volts)3.3 V  
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Product Information

Features

  • High-Performance Static CMOS Technology
  • TMS470R1x 16/32-Bit RISC Core (ARM7TDMI™)
    • 20-MHz System Clock
    • Independent 16/32-Bit Instruction Set
    • Open Architecture With Third-Party Support
    • Built-In Debug Module
    • Utilizes Big-Endian Format
  • Upwardly Software-Compatible With the TMS470R1VF336 Device
  • Integrated Memory
    • 32K-Byte Program ROM
    • 2.5K-Byte Static RAM (SRAM)
  • Operating Features
    • Core Supply Voltage (VCC): 1.8 V Nominal
    • I/O Supply Voltage (VCCIO): 3.3 V Nominal
    • Low-Power Modes: STANDBY and HALT
    • Industrial and Automotive Temperature Ranges
  • 470+ System Module
    • 32-Bit Address Space Decoding
    • Bus Supervision for Memory/Peripherals
    • Analog Watchdog (AWD) Timer
    • Real-Time Interrupt (RTI)
    • System Integrity and Failure Detection
  • Clock Divider Module (CDM)
    • Crystal Oscillator, Clock Monitor Circuit, and Prescaler
  • Serial Peripheral Interface (SPI)
    • 255 Programmable Baud Rates
  • Two Serial Communication Interfaces (SCIs)
    • 224 Selectable Baud Rates
  • 16-Input/Output High-End Timer (HET)
    • 16 Programmable I/O Channels:
      • 12 High-Resolution Pins
      • 4 Standard-Resolution Pins
    • High-Resolution Share Feature (XOR)
    • High-End Timer RAM
      • 32-Instruction Capacity
  • Seven External Interrupts
  • Flexible Interrupt Handling
  • 6 Dedicated GIO Pins,1 Input-Only GIO Pin, and 22 Additional Peripheral I/Os
  • On-Chip Scan-Base Emulation Logic, IEEE Standard 1149.1 (JTAG) Test-Access Port
  • 100-Pin Plastic Low-Profile Quad Flatpack PZ Suffix)
  • Development System Support Tools Available
    • Code Composer Studio™ IDE
    • HET Assembler and Simulator
    • Real-Time In-Circuit Emulation
  • External Clock Prescale (ECP) Module
    • Programmable Low-Frequency External Clock (CLK)

Code Composer Studio is a trademark of Texas Instruments.
ARM7TDMI is a trademark of Advanced RISC Machines Limited (ARM).
All trademarks are the property of their respective owners.

IEEE Standard 1149.1-1990, IEEE Standard Test-Access Port and Boundary Scan Architecture.
(1) The TMS470R1VC002 device name shall be referred to as VC002 throughout the remainder of this document.

Description

The TMS470R1VC002(1) device is a member of the Texas Instruments (TI) TMS470R1x family of generalpurpose16/ 32-bit reduced instruction set computer (RISC) microcontrollers. The VC002 microcontroller offers high performance utilizing the high-speed ARM7TDMI 16/32-bit RISC central processing unit (CPU), resulting in a high instruction throughput while maintaining greater code efficiency. The ARM7TDMI 16/32-bit RISC CPU views memory as a linear collection of bytes numbered upwards from zero. The TMS470R1VC002 utilizes the big-endian format where the most significant byte of a word is stored at the lowest numbered byte and the least significant byte at the highest numbered byte.

High-end embedded control applications demand more performance from their controllers while maintaining low costs. The VC002 RISC core architecture offers solutions to these performance and cost demands while maintaining low power consumption.

The VC002 devices contain the following:

  • ARM7TDMI 16/32-Bit RISC CPU
  • TMS470R1x system module (SYS) with 470+ enhancements
  • 32K-byte flash
  • 2.5K-byte SRAM
  • Clock divider module (CDM)
  • Analog watchdog (AWD) timer
  • Real-time interrupt (RTI) module
  • Serial peripheral interface (SPI) module
  • High-end timer (HET) controlling 16 I/Os
  • External Clock Prescale (ECP)
  • Up to 28 I/O pins and 1 input-only pin

The functions performed by the 470+ system module (SYS) include: address decoding; memory and peripherals bus supervision; reset and abort exception management; prioritization for all internal interrupt sources; device clock control; and parallel signature analysis (PSA). This data sheet includes device-specific information such as memory and peripheral select assignment, interrupt priority, and a device memory map. For a more detailed functional description of the SYS module, see the TMS470R1x System Module Reference Guide (literature number SPNU189).

The VC002 memory includes general-purpose SRAM supporting single-cycle read/write accesses in byte, half-word, and word modes.

The ROM memory on the VC002 device is programmable read-only memory that is masked at the time of device fabrication.

The VC002 device has a serial peripheral interface (SPI). The SPI provides a convenient method of serial interaction for high-speed communications between similar shift-register type devices. For more detailed functional information on the SPI peripheral, see the TMS470R1x Serial Peripheral Interface (SPI) Reference Guide (literature number SPNU195).

The HET is a 16-bit advanced intelligent timer that provides sophisticated timing functions for real-time applications. The timer is software-controlled, using a reduced instruction set, with a specialized timer micromachine and an attached I/O port. The HET can be used for compare, capture, or general-purpose I/O. It is especially well suited for applications requiring multiple sensor information and drive actuators with complex and accurate time pulses. For more detailed functional information on the HET, see the TMS470R1x High-End Timer (HET) Reference Guide (literature number SPNU199).

The clock divider module (CDM) contains a clock-monitor circuit, a clock-enable circuit, and a prescaler (with prescale values of 1-8). The CDM provides ACLK to the system (SYS) module. The SYS module subsequently provides system clock (SYSCLK), real-time interrupt clock (RTICLK), CPU clock (MCLK), and peripheral interface clock (ICLK) to all other VC002 device modules. For more detailed functional information on the CDM, see the TMS470R1x Clock Divider Module (CDM) Reference Guide (literature number SPNU215).

The VC002 device also has an external clock prescaler (ECP) module that when enabled, outputs a continuous external clock (ECLK) on a specified GIO pin. The ECLK frequency is a user-programmable ratio of the peripheral interface clock (ICLK) frequency. For more detailed functional information on the ECP, see the TMS470R1x External Clock Prescaler (ECP) Reference Guide (literature number SPNU202).

    

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Technical Documents

Datasheets

  • TMS470R1VC002 16/32-Bit RISC ROM Microcontroller (Rev. B) (tms470r1vc002.pdf, 452 KB)
    07 Oct 2002 Download

User Guides

  • TMS470R1x Serial Peripheral Interface (SPI) Reference Guide (Rev. E) (spnu195e.htm, 8 KB)
    30 Sep 2005 Abstract
  • TMS470R1x General-Purpose Input/Output (GIO) Reference Guide (Rev. D) (spnu192d.htm, 8 KB)
    31 Jan 2005 Abstract
  • TMS470R1x System Module Reference Guide (Rev. H) (spnu189h.htm, 8 KB)
    01 Nov 2004 Abstract
  • TMS470R1x External Clock Prescale (ECP) Reference Guide (Rev. B) (spnu202b.htm, 8 KB)
    01 Nov 2004 Abstract
  • TMS470R1x High-End Timer (HET) Reference Guide (Rev. D) (spnu199d.pdf, 830 KB)
    30 Jul 2004 Download
  • TMS470R1x Clock Divider Module (CDM) Reference Guide (Rev. A) (spnu215a.htm, 8 KB)
    16 Sep 2002 Abstract
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