TPS51100 Status: ACTIVE

3A Source/Sink DDR terminator Regulator

      
         
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Datasheet

Download - PDF Icon
  • 3-A SINK/SOURCE DDR TERMINATION REGULATOR (Rev. C) (tps51100.pdf, 1175 KB)
    05 Jun 2008 Download

 TPS51100TPS51200 
Iout(Max)(A)3  3  
Iq(Typ)(mA)0.5  0.5  
Vin(Min)(V)4.75  2.375  
Vin(Max)(V)5.25  3.5  
Output Capacitor(uF)20  20  
Output Capacitor TypeCeramic  Ceramic  
Pin/Package10MSOP-PowerPAD  10SON  
RatingCatalog  Catalog  
 SamplesSamples
 InventoryInventory

Customers Who Evaluated This Product Also Evaluated

  • TPS73633: Single Output LDO, 400-mA, Fixed (3.3 V), Cap-Free, Low-Noise, Reverse Current Protection
  • TPS79301: Single Output LDO, 200mA, Adj.(1.2 to 5.5V), High PSRR, Low Noise
  • TPS73033: Single Output LDO, 200mA, Fixed(3.3V), High PSRR, Low Noise
  • TPS61200: 0.3V Input Voltage Boost Converter with 1.5A Switches and 'Down Mode' in a 3x3 QFN
  • TPS51116: DDR1, DDR2, DDR3 Switcher and LDO
  • TPS62200: Adjustable, 300-mA, 95% Efficient Step-Down Converter in SOT-23

More Related Products

Product Information

Features

  • Input Voltage Range: 4.75 V to 5.25 V
  • VLDOIN Voltage Range: 1.2 V to 3.6 V
  • 3-A Sink/Source Termination Regulator Includes Droop Compensation
  • Requires Only 20-µF Ceramic Output Capacitance
  • Supports High-Z in S3 and Soft-Off in S5
  • 1.2-V Input (VLDOIN) Helps Reduce Total Power Dissipation
  • Integrated Divider Tracks ½VDDQSNS for VTT and VTTREF
  • Remote Sensing (VTTSNS)
  • ± 20-mV Accuracy for VTT and VTTREF
  • 10-mA Buffered Reference (VTTREF)
  • Built-In Soft-Start, UVLO and OCL
  • Thermal Shutdown
  • Supports JEDEC Specifications
  • APPLICATIONS
    • DDR, DDR2 Memory Termination
    • SSTL-2, SSTL-18 and HSTL Termination

Description

The TPS51100 is a 3-A sink/source tracking termination regulator. It is specifically designed for low-cost/low-external component count systems, where space is a premium.

The TPS51100 maintains fast transient response only requiring 20-µF (2 × 10µF) of ceramic output capacitance. The TPS51100 supports remote sensing functions and all features required to power the DDR and DDR2 VTT bus termination according to the JEDEC specification. In addition, the TPS51100 includes integrated sleep-state controls placing VTT in High-Z in S3 (suspend to RAM) and soft-off for VTT and VTTREF in S5 (suspend to disk). The TPS51100 is available in the thermally efficient 10-pin MSOP PowerPAD™ and is specified from –40°C to 85°C.

    

Pricing / Packaging / CAD Design Tools / Samples

PricePackagingCAD Design ToolsSamples
DeviceStatusTemp (oC)Price | QuantityPackage | PinsTop Side MarkingPackage QTY | Package CarrierSymbolsSamples
TPS51100DGQACTIVE-40 to 851.00 | 100uMSOP-PowerPAD (DGQ) | 10 View 80 | TUBE Download CAD Format for this Symbol
TPS51100DGQG4ACTIVE-40 to 851.00 | 100uMSOP-PowerPAD (DGQ) | 10 View 80 | TUBE Download CAD Format for this Symbol
TPS51100DGQRACTIVE-40 to 851.00 | 100uMSOP-PowerPAD (DGQ) | 10 View 2500 | LARGE T&R Download CAD Format for this SymbolPurchase Samples
TPS51100DGQRG4ACTIVE-40 to 851.00 | 100uMSOP-PowerPAD (DGQ) | 10 View 2500 | LARGE T&R Download CAD Format for this SymbolPurchase Samples

* Suggested Resale Price per unit (USD) for BUDGETARY USE ONLY. For higher volume price quotes,prices in local currency or delivery quotes, please contact your local Texas Instruments Sales Office or Authorized Distributor.

Inventory

  TI Inventory Status Reported Distributor Inventory
TPS51100DGQAs of 8:03 AM GMT, 12 Oct 2008As of 8:03 AM GMT, 12 Oct 2008
 In StockIn Progress QTY | DateLead TimeRegionCompanyIn StockPurchase
 3717* >10k | 19 Nov 6 Weeks AmericasArrow >1k
  DigiKey >1k
  Mouser Electronics 539
  Newark 255
  EuropeAbacus Polar 240
  Avnet-SILICA 56
  Spoerle >1k
TPS51100DGQG4As of 8:03 AM GMT, 12 Oct 2008As of 8:03 AM GMT, 12 Oct 2008
 In StockIn Progress QTY | DateLead TimeRegionCompanyIn StockPurchase
 3717* >10k | 19 Nov 6 Weeks AmericasAvnet 122
  Mouser Electronics 320
  EuropeArrow Northern Europe 80
  EBV Elektronik >1k
TPS51100DGQRAs of 8:03 AM GMT, 12 Oct 2008As of 8:03 AM GMT, 12 Oct 2008
 In StockIn Progress QTY | DateLead TimeRegionCompanyIn StockPurchase
 0* >10k | 19 Nov 6 Weeks AmericasArrow >1k
  Avnet >1k
  DigiKey >1k
  Newark >1k
  EuropeArrow Southern Europe >1k
  Avnet-SILICA >1k
TPS51100DGQRG4As of 8:03 AM GMT, 12 Oct 2008As of 8:03 AM GMT, 12 Oct 2008
 In StockIn Progress QTY | DateLead TimeRegionCompanyIn StockPurchase
 0* >10k | 19 Nov 6 Weeks None Reported
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* Our information is updated daily, so please check back with us soon if this does not meet your needs. You may also contact your TI Authorized Distributor , including those listed above, for real time stock information.

** Lead time information is not available at this time. However, our information is updated daily so please check back with us soon. Please contact your preferred TI Authorized Distributor for additional information.

Quality & Lead (Pb)-Free Data

 Product ContentDPPM / MTBF / FIT Rate
DeviceEco Plan* Lead / Ball FinishMSL Rating / Peak ReflowDetailsDetails
TPS51100DGQ RoHS Compliant Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIMViewView
TPS51100DGQG4 RoHS Compliant Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIMViewView
TPS51100DGQR RoHS Compliant Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIMViewView
TPS51100DGQRG4 RoHS Compliant Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIMViewView

* The planned eco-friendly classification: Pb-Free (RoHS) or Pb-Free (RoHS Exempt) or Green (RoHS & no Sb/Br) - please click on the Product Content Details "View" link in the table above for the latest availability information and additional product content details.

If the information you are requesting is not available online at this time, contact one of our Product Information Centers regarding the availability of this information.

Technical Documents

Datasheets

  • 3-A SINK/SOURCE DDR TERMINATION REGULATOR (Rev. C) (tps51100.pdf, 1175 KB)
    05 Jun 2008 Download

Application Notes

View Application Notes for Single Channel LDO

User Guides

  • Using the TPS51100 (sluu201.pdf, 231 KB)
    13 Jul 2004 Download

View User Guides for Single Channel LDO

Simulation Models

  • Spice Model
    • TPS51100 TINA Models (slvc177.zip, 1299 KB)
      31 Jul 2008 zip

More Literature

View More Literature for Single Channel LDO

Tools & Software

NamePart # Company Tool / Software Type
TPS51100EVM-001 Evaluation ModuleTPS51100EVM-001Texas InstrumentsDevelopment Boards/EVMs
TPS51116EVM-001 Evaluation ModuleTPS51116EVM-001Texas InstrumentsDevelopment Boards/EVMs
TPS51200 Sink Source DDR Termination RegulatorTPS51200EVMTexas InstrumentsDevelopment Boards/EVMs

 Alternative Products - Are similar to TPS51100
Customers Who Evaluated This Product Also Evaluated...
Part #Name Comments
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TPS73033Single Output LDO, 200mA, Fixed(3.3V), High PSRR, Low NoiseTI customers also evaluated this product.
TPS51200Sink/Source DDR Termination RegulatorTI customers also evaluated this product.
 Complementary Products - Can be used with TPS51100
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