TPS737

ACTIVE

1-A, ultra-low-dropout voltage regulator with reverse current protection & enable

Product details

Output options Adjustable Output, Fixed Output Iout (max) (A) 1 Vin (max) (V) 5.5 Vin (min) (V) 2.2 Vout (max) (V) 5.4 Vout (min) (V) 1.2 Fixed output options (V) 1.8, 2.5, 3, 3.3, 3.4 Noise (µVrms) 48 Iq (typ) (mA) 0.4 Thermal resistance θJA (°C/W) 47.7, 50 Rating Catalog Load capacitance (min) (µF) 1 Regulated outputs (#) 1 Features Enable, Foldback Overcurrent protection, Foldback overcurrent protection, Reverse Current Protection, Reverse current protection Accuracy (%) 3 PSRR at 100 KHz (dB) 33 Dropout voltage (Vdo) (typ) (mV) 130 Operating temperature range (°C) -40 to 125
Output options Adjustable Output, Fixed Output Iout (max) (A) 1 Vin (max) (V) 5.5 Vin (min) (V) 2.2 Vout (max) (V) 5.4 Vout (min) (V) 1.2 Fixed output options (V) 1.8, 2.5, 3, 3.3, 3.4 Noise (µVrms) 48 Iq (typ) (mA) 0.4 Thermal resistance θJA (°C/W) 47.7, 50 Rating Catalog Load capacitance (min) (µF) 1 Regulated outputs (#) 1 Features Enable, Foldback Overcurrent protection, Foldback overcurrent protection, Reverse Current Protection, Reverse current protection Accuracy (%) 3 PSRR at 100 KHz (dB) 33 Dropout voltage (Vdo) (typ) (mV) 130 Operating temperature range (°C) -40 to 125
SOT-223 (DCQ) 6 45.89 mm² 6.5 x 7.06 VSON (DRB) 8 9 mm² 3 x 3 WSON (DRV) 6 4 mm² 2 x 2
  • Stable with 1-µF or larger ceramic output capacitor
  • Input voltage range: 2.2 V to 5.5 V
  • Ultra-low dropout voltage
    • Legacy silicon: 130 mV typical at 1 A
    • New silicon, M3 suffix: 122 mV typical at 1 A
  • Excellent load transient response—even with only 1-µF output capacitor
  • NMOS topology delivers low reverse leakage current
  • Initial accuracy: 1%
  • Overall accuracy over line, load, and temperature
    • Legacy silicon: 3%
    • New silicon, M3 suffix: 1.5%
  • Less than 20 nA typical IQ in shutdown mode
  • Thermal shutdown and current limit for fault protection
  • Available in multiple output voltage versions:
    • Adjustable output: 1.20 V to 5.5 V
    • Custom outputs available using factory package-level programming
  • Stable with 1-µF or larger ceramic output capacitor
  • Input voltage range: 2.2 V to 5.5 V
  • Ultra-low dropout voltage
    • Legacy silicon: 130 mV typical at 1 A
    • New silicon, M3 suffix: 122 mV typical at 1 A
  • Excellent load transient response—even with only 1-µF output capacitor
  • NMOS topology delivers low reverse leakage current
  • Initial accuracy: 1%
  • Overall accuracy over line, load, and temperature
    • Legacy silicon: 3%
    • New silicon, M3 suffix: 1.5%
  • Less than 20 nA typical IQ in shutdown mode
  • Thermal shutdown and current limit for fault protection
  • Available in multiple output voltage versions:
    • Adjustable output: 1.20 V to 5.5 V
    • Custom outputs available using factory package-level programming

The TPS737 linear low-dropout (LDO) voltage regulator uses an NMOS pass transistor in a voltage-follower configuration. This topology is relatively insensitive to the output capacitor value and ESR, allowing for a wide variety of load configurations. Load transient response is excellent, even with a small 1-µF ceramic output capacitor. The NMOS topology also allows for very low dropout.

The TPS737 uses an advanced BiCMOS process to yield high precision while delivering very low dropout voltages and low ground pin current. Part numbers with the M3 suffix use an updated design on the latest TI process technology. Current consumption, when not enabled, is less than 20 nA and is designed for portable applications. This device is protected by thermal shutdown and foldback current limit.

For applications that require higher output voltage accuracy, consider TI’s TPS7A37 1% overall accuracy, 1-A low-dropout voltage regulator.

The TPS737 linear low-dropout (LDO) voltage regulator uses an NMOS pass transistor in a voltage-follower configuration. This topology is relatively insensitive to the output capacitor value and ESR, allowing for a wide variety of load configurations. Load transient response is excellent, even with a small 1-µF ceramic output capacitor. The NMOS topology also allows for very low dropout.

The TPS737 uses an advanced BiCMOS process to yield high precision while delivering very low dropout voltages and low ground pin current. Part numbers with the M3 suffix use an updated design on the latest TI process technology. Current consumption, when not enabled, is less than 20 nA and is designed for portable applications. This device is protected by thermal shutdown and foldback current limit.

For applications that require higher output voltage accuracy, consider TI’s TPS7A37 1% overall accuracy, 1-A low-dropout voltage regulator.

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Technical documentation

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Type Title Date
* Data sheet TPS737 1-A Low-Dropout Regulator With Reverse Current Protection datasheet (Rev. T) PDF | HTML 13 Dec 2023
Application note LDO Noise Demystified (Rev. B) PDF | HTML 18 Aug 2020
Application note A Topical Index of TI LDO Application Notes (Rev. F) 27 Jun 2019
Application note LDO PSRR Measurement Simplified (Rev. A) PDF | HTML 09 Aug 2017
EVM User's guide TPS73701DRVEVM-529 User's Guide 20 Feb 2013
Application note LDO Performance Near Dropout 08 Oct 2010
User guide TPS73x01DRBEVM-518 User's Guide 13 Aug 2009
Application note 5 VIN solution using DCDC Controllers, a LDO, and a Digitally Prog. Sequencer 24 Nov 2008
User guide DEM-SOT223LDO Demonstration Fixture 15 Oct 2003

Design & development

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Simulation model

TPS73701 PSpice Transient Model (Rev. A)

SBVM100A.ZIP (22 KB) - PSpice Model
Simulation model

TPS73701 TINA-TI Transient Reference Design

SBVM212.TSC (618 KB) - TINA-TI Reference Design
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TPS73701 TINA-TI Transient Spice Model

SBVM213.ZIP (5 KB) - TINA-TI Spice Model
Simulation model

TPS73718 PSPICE Transient Model (Rev. A)

SBVM036A.ZIP (21 KB) - PSpice Model
Simulation model

TPS73718 Unencrypted PSpice Model

SBVM407.ZIP (1 KB) - PSpice Model
Simulation model

TPS73725 PSpice Transient Model

SBVM306.ZIP (21 KB) - PSpice Model
Simulation model

TPS73730 PSpice Transient Model

SBVM307.ZIP (22 KB) - PSpice Model
Simulation model

TPS73733 PSpice Transient Model

SBVM291.ZIP (22 KB) - PSpice Model
Simulation model

TPS73734 PSpice Transient Model

SBVM308.ZIP (22 KB) - PSpice Model
Gerber file

TPS73701DRVEVM-529 Gerber Files

SLVC482.ZIP (754 KB)

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SOT-223 (DCQ) 6 View options
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