Product details

Technology family TXB Applications SPI Bits (#) 6 Data rate (max) (Mbps) 100 High input voltage (min) (V) 0.78 High input voltage (max) (V) 5.5 Vout (min) (V) 1.2 Vout (max) (V) 5.5 IOH (max) (mA) -0.02 IOL (max) (mA) 0.02 Supply current (max) (µA) 10 Features Edge rate accelerator, Integrated pullup resistors, Output enable, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 85
Technology family TXB Applications SPI Bits (#) 6 Data rate (max) (Mbps) 100 High input voltage (min) (V) 0.78 High input voltage (max) (V) 5.5 Vout (min) (V) 1.2 Vout (max) (V) 5.5 IOH (max) (mA) -0.02 IOL (max) (mA) 0.02 Supply current (max) (µA) 10 Features Edge rate accelerator, Integrated pullup resistors, Output enable, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 85
TSSOP (PW) 16 32 mm² 5 x 6.4 VQFN (RGY) 16 14 mm² 4 x 3.5
  • 1.2 V to 3.6 V on A Port and 1.65 to 5.5 V on
    B Port (VCCA≤ VCCB)
  • VCC Isolation Feature – If Either VCC Input Is at
    GND, All Outputs Are in the High-Impedance
    State
  • OE Input Circuit Referenced to VCCA
  • Low-Power Consumption, 4 µA Max ICC
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per
    JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • A Port
      • 2500 V Human Body Model (A114-B)
      • 150 V Machine Model (A115-A)
      • 1500 V Charged-Device Model (C101)
    • B Port
      • ±15 kV Human Body Model (A114-B)
      • 150 V Machine Model (A115-A)
      • 1500 V Charged-Device Model (C101)
  • 1.2 V to 3.6 V on A Port and 1.65 to 5.5 V on
    B Port (VCCA≤ VCCB)
  • VCC Isolation Feature – If Either VCC Input Is at
    GND, All Outputs Are in the High-Impedance
    State
  • OE Input Circuit Referenced to VCCA
  • Low-Power Consumption, 4 µA Max ICC
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per
    JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • A Port
      • 2500 V Human Body Model (A114-B)
      • 150 V Machine Model (A115-A)
      • 1500 V Charged-Device Model (C101)
    • B Port
      • ±15 kV Human Body Model (A114-B)
      • 150 V Machine Model (A115-A)
      • 1500 V Charged-Device Model (C101)

This 6-bit noninverting translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, and 5 V voltage nodes. VCCA should not exceed VCCB.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

The TXB0106 is designed so that the OE input circuit is supplied by VCCA.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

This 6-bit noninverting translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, and 5 V voltage nodes. VCCA should not exceed VCCB.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

The TXB0106 is designed so that the OE input circuit is supplied by VCCA.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

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Technical documentation

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Type Title Date
* Data sheet 6-Bit Bidirectional Voltage-Level Translator, TXB0106 datasheet (Rev. B) 20 Feb 2015
Application note Leveraging Edge Rate Accelerators with Auto-Sensing Level Shifters PDF | HTML 29 Sep 2023
Application note Do’s and Don’ts for TXB and TXS Voltage Level-Shifters with Edge Rate Accelerato PDF | HTML 28 Jun 2023
Selection guide Voltage Translation Buying Guide (Rev. A) 15 Apr 2021
Application note Biasing Requirements for TXS, TXB, and LSF Auto-Bidirectional Translators 30 Oct 2017
Application note A Guide to Voltage Translation With TXS-Type Translators 29 Jun 2010
Application note A Guide to Voltage Translation With TXB-Type Translators 03 Mar 2010

Design & development

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Simulation model

TXB0106 IBIS Model

SCEM556.ZIP (207 KB) - IBIS Model
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Package Pins Download
TSSOP (PW) 16 View options
VQFN (RGY) 16 View options

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