Block Diagram (SBD) - High-Speed Data Acquisition Front End

Block Diagram

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High Speed Data Acquisition System

A high speed data acquisition system implements high-speed integrated circuits to trigger and acquire high data rate flow control and storing.

Core Subsystems include:

Analog Input Front End - built around a high-speed ADC including high-speed Op-Amps, FIFOs, and SRAMs. The stream of data output from the ADC is written into FIFOs, stored in blocks of SRAM, and sent directly to the outside world through registers under the control of the data acquisition logic in the FPGA.
FPGA - contains data acquisition controls and logics including the trigger logic, error detection, DSP interface, memory address decoder, counters, and output control. The control logic selects a data acquisition clock, processes different triggers, and transfers the acquired data to the internal memory of the data acquisition channels.
Analog Output - built around a high-speed DAC, including Op-Amp and output data buffer.
High-Speed Bus Interface - transfers data through high-speed parallel bus on the back plane (PCI,VMEbus) or high-speed Ethernet.
Clock Source - provides clock for different data acquisition options and modes.
Power Managements - converts the input power from the backplane to run various functional blocks.

Most useful technical documents for High-Speed Data Acquisition and Generation

Flash Programming Solutions for the TMS320F28xxx DSCs (HTM 8 KB) 12802 views
19 Aug 2008 Read Abstract
A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. A) (HTM 8 KB) 15899 views
12 Jan 2008 Read Abstract

Most useful technical documents for High-Speed Data Acquisition and Generation

Clocks and Timing Selection Guide (Rev. B) (PDF 3.19 MB) 24631 views
30 Mar 2009
Amplifier and Data Converter Selection Guide (Rev. C) (PDF 8.72 MB) 101263 views
21 Sep 2008

Name	Part #	Company	Software/Tool Type
Anti-Aliasing Calculation Tool for A to D Converters	ANTIALIASINGCALC	Texas Instruments	Calculation Utilities
Op Amp to ADC Circuit Topology Calculator	ADC-INPUT-CALC	Texas Instruments	Calculation Utilities

Date	Headline
22 Jun 2009	TI introduces industry's first 18-bit system-on-chip up to 1 MSPS for high-speed data acquisition

Direct RF Sampling with High Performance ADC - Philip Pratt, ECNmag.com
01 Sep 2008 View Article
ADCs: Does ENOB tell the whole story? - Bonnie Baker, EDN
17 Apr 2008 View Article
Programmability offers versatility in high-speed ADCs - Phillip Pratt, Systems Engineer, Planet Analog
24 Oct 2007 View Article