Currency Counter

Block diagram (SBD) for a Currency Counter supporting ultraviolet, infrared, and magnetic sensing, and CIS / CID imaging for banknote verification, and a powerful processor or microcontroller analytics processing for banknote verification.

Block Diagram

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ADC ADC ADC ADC Sensor Amplifier Sensor Amplifier Sensor Amplifier Sensor Amplifier Touch Screen Control Motor Driver Audio DAC Audio Amplifier Clock DAC Interface Isolation Isolation Isolation Level Shift AC Adaptor Backlight Battery Management LED Power Low  Noise Power Memory Power System Power Applications Processor MCU Voltage References CCD/CIS AFE

Design Considerations

Currency Counters not only count, they also function as a high speed counterfeit banknote detector. With the advanced printing, copying and electronic scanning technologies available today, the need to validate currency authenticity has increased dramatically, increasing the demand for continuous improvement of counterfeit detection technologies.

The electronics, are a highly a mixed-signal system driven by a DSP or MCU for system processing, which is surrounded by a high performance analog products.

Ultraviolet, infrared & magnetic sensing are the typical detection techniques used today to verify the inherent characteristics of banknotes. More advanced systems, capture the banknote images with a CIS or CCD scan, enabling the recognition of denomination, serial number and other aspects of each note.

  • Fluorescence detection uses UV light to check for missing marks & irradiation response of the fake notes.
  • Magnetic ink & different patterns of security strip can be detected by using the magnetic head with a precision amplification scheme.
  • Infrared penetration is used to the thickness detection of the banknote & the absorption of infrared signals to identify the genuine banknotes.

The response signals of these various transducers are low level signals which are very sensitive to system noise. As such a high performance signal conditioning design is required. Multiple channel input, high resolution data converters help simplify the design layout & ensure the accurate measurement.

For those systems which require banknote imaging, in addition to high performance analog signal chains, a system processor such as DSP or ARM combined with a CIS/CCD AFE, capable of complicated algorithmic calculations would be required. The additional processing capability allows the system to perform denomination classification, OCR recognition & banknote fitness detection, etc.

Understandably, there are design trade offs between sheer counting speed and amount of banknote validation that can be done. However, improved motor control and drive designs can help with overall system optimization. Especially as many designs are migrating to BLDC & Stepper motors, due to their low-maintenance, precision & controllability characteristics.

Application Notes

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