CDC7005 and CDCM7005 PLL Loop Bandwidth Calculator Status: ACTIVE

CDC-CDCM7005-CALC


      
         
  CDC-CDCM7005-CALC
NameCDC7005 and CDCM7005 PLL Loop Bandwidth Calculator
StatusACTIVE
Price (US$)Free 

Product Information

Description

This tool helps to determine the right divider values (M, N & P) and to choose the filter type and components. This calculator will help to find out the appropriate loop bandwidth, phase margin, jitter peaking, etc. just varying the loop parameters like PFD frequency, filter components, Charge pump current, and VCO gain (Hz/V). This is a software package that lets the Engineers enter a piecewise-linear noise model for the VCO (VCXO) and the reference clock source to predict the PLL output phase noise and hence calculate the phase jitter.

Features

The lab view based tool can:

  • Determine the PFD frequency automatically
  • Calculate loop bandwidth, Phase margin and Jitter peaking
  • Predict the PLL output Phase noise
  • Calculate Phase Jitter (rms)

Support Software

Compatibility Issues

There are two versions of the tool available, depending on the program used:

  • For Labview version, download zip file SCAC059 (revision letter may be present depending on last update)
  • For Excel version, download zip file SCAC036 (revision letter may be present depending on last update)

Downloads can be accessed through the "Support Software" section of this folder.

    
Related Devices
Part# Name Product Family
CDC7005 High Performance, Low Phase Noise, Low Skew Clock Synchronizer that Synchronizes Ref Clock to VCXO Ultra Low Jitter Synthesizer and Jitter Cleaner 
CDCM7005 High Performance, Low Phase Noise, Low Skew Clock Synchronizer that Synchronizes Ref Clock to VCXO Ultra Low Jitter Synthesizer and Jitter Cleaner 

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