C6455 Evaluation Module Status: ACTIVE

Product Information

Description

The C64+™ Evaluation Module (EVM) developed jointly with Spectrum Digital features two 1 GHz TMS320C6455 DSPs connected via Serial Rapid IO™ (sRIO™). The EVM includes the sRIO bus interface offering a complete, easy-to-use multiprocessor C6455 DSP development system with sRIO communications connectivity to third party tools, FGPAs, sRIO switches and sRIO equipped embedded processors.

The kit includes a standard 14 pin JTAG interface as well as the high density 60-pin interface for advanced emulation and is fully compatible with TI’s Code Composer Studio Integrated Development Environment.

The EVM board features two C6455’s on the EVM connected via industry standard ATCA AMC connector. The AMC connector on Base Board allows 3rd party sRIO expansion cards plus a design reference file is included to speed development (schematic and layout files).

Ordering Information: TMDXEVM6455 includes a standard US power cord, TMDXEVM6455-0E version includes both UK & European power cords.

Features

The EVM features two TMS320C6455 DSPs and is designed for products that require the highest performing DSPs. The C6455 is based on the high performing TMS320C64x+ DSP platform designed to needs of high-performing memory intensive applications such as networking, video, imaging, and most multi-channel systems. Other hardware features of the TMS320C6455 EVM board include:

• Two 1 Ghz C6455 DSPs
• 256MB DDR2 500MHz and 8MB Flash

• Conforms to TI Standard, same format as C6415

• EMIF(32bit data) & McBSP0 to Connector1
• HPI/PCI to Connector2

• UTOPIA2 to Connector3

• 2 C6455 Connected via Serial RapidIO
• All 4 links supported between DSP A & DSP B
• 2 Ethernet PHY’s supported
• DSP A: 10/100 via MII
• DSP B: 10/100/1000 via RGMII

• High-quality 24-bit stereo codec

• JTAG Support on both DSPA & DSPB
• On-board standard 14-pin IEEE JTAG interface
• On-board 60-pin high density JTAG interface

The C6455 EVM is fully compatible with TI’s robust and comprehensive Code Composer Studio™ Inegrated Development Environment. The EVM software and support includes:

• Chip Support Libraries (CSL) 3.x APIs
• Example Programs and Documentation
• MSGQ support enables abstracted inter-processor communications for Message Passing functionality
• Message Queue Transport Driver with source
• MSGQ example code with source
• Register Layer CSL source code for sRIO endpoint setup
• Functional and Register Layer CSL support for sRIO Direct I/O support

Board Support Library – The Board Support Library (BSL) provides a C-language interface for configuring and controlling all on-board devices. The library consists of discrete modules that are built and archived into a library file. Each module represents an individual application program interface (API) and is referred to simply as an API module. The module granularity is structured so each device is implemented in an individual API module. The goal of the BSL is to provide a level of hardware abstraction and software standardization that improves development time and portability. The BSL source code is available in the lib directory along with the library itself. You may extend or modify the source code and build your own version of the library. You can also include the BSL source files directly into your application for greater control.

Example code with full source for:

• Power On Self Test – POST – This is typically already programmed into flash memory on the board, so it runs on boot.
• Sample application – LED Blink Example (2 versions)– blinks LED #0 using BSL calls
• Sample application for AIC23 codec – Uses BSL to generate a 1KHz sine wave