SBAS972 November   2022 AFE7952

PRODUCTION DATA  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Functional Block Diagram
    1. 4.1 AFE7952 Functional Block Diagram
  5. 5Revision History
  6. 6Device and Documentation Support
    1. 6.1 Trademarks
    2. 6.2 Electrostatic Discharge Caution
    3. 6.3 Glossary
  7. 7Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • Quad RF sampling 12-GSPS transmit DACs
  • Quad RF sampling 3-GSPS receive ADCs
  • Dual RF sampling 3-GSPS feedback ADCs
  • Maximum RF signal bandwidth:
    • TX: 2400 MHz for 2TX or 1200 MHz for 4TX
    • FB: 1200 MHz
    • RX: 1200 MHz (no FB); 600 MHz (with FB)
  • RF frequency range: up to 12 GHz
  • Digital Step Attenuators (DSA):
    • TX: 40 dB range, 1-dB analog and 0.125-dB digital steps
    • RX: 25 dB range, 0.5-dB steps
  • Dual-band DUC/DDCs for TX and RX
  • Dual NCOs for fast frequency switching
  • Supports TDD operation with fast switching between TX and RX
  • Internal PLL/VCO to generate DAC/ADC clocks
  • Optional external CLK at DAC or ADC rate
  • SerDes data interface:
    • JESD204B and JESD204C compliant
    • 8 SerDes transceivers up to 29.5 Gbps
    • 8b/10b and 64b/66b encoding
    • 12-bit, 16-bit, 24-bit, and 32-bit resolution
    • Subclass 1 multi-device synchronization
  • Package: 17-mm × 17-mm FCBGA, 0.8-mm pitch