SLUSA21A February   2010  – December 2014 UCC2818A-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Thermal Information
    4. 6.4 Electrical Characteristics
  7. Detailed Description
    1. 7.1 Functional Block Diagram
    2. 7.2 Feature Description
      1. 7.2.1  Current Amplifier Noninverting Input, CAI
      2. 7.2.2  Current Amplifier Output, CAOUT
      3. 7.2.3  Oscillator Timing Capacitor, CT
      4. 7.2.4  Gate Drive, DRVOUT
      5. 7.2.5  Ground, GND
      6. 7.2.6  Current Proportional to Input Voltage, IAC
      7. 7.2.7  Multiplier Output and Current Amplifier Inverting Input, MOUT
      8. 7.2.8  Overvoltage and Enable, OVP/EN
      9. 7.2.9  PFC Peak Current-Limit, PKLMT
      10. 7.2.10 Oscillator Charging Current, RT
      11. 7.2.11 Soft Start, SS
      12. 7.2.12 Voltage amplifier output, VAOUT
      13. 7.2.13 Positive Supply Voltage, VCC
      14. 7.2.14 Feed-Forward Voltage, VFF
      15. 7.2.15 Voltage Amplifier Inverting Input, VSENSE
      16. 7.2.16 Voltage Reference Output, VREF
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Detailed Design Procedure
        1. 8.2.1.1 Power Stage
          1. 8.2.1.1.1 LBOOST
          2. 8.2.1.1.2 COUT
        2. 8.2.1.2 Soft Start
        3. 8.2.1.3 Multiplier
        4. 8.2.1.4 Voltage Loop
        5. 8.2.1.5 Current Loop
          1. 8.2.1.5.1 Start Up
          2. 8.2.1.5.2 Capacitor Ripple Reduction
      2. 8.2.2 Application Curves
  9. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Qualified for Automotive Applications
  • Controls Boost Preregulator to Near-Unity Power Factor
  • Limits Line Distortion
  • World-Wide Line Operation
  • Overvoltage Protection
  • Accurate Power Limiting
  • Average Current Mode Control
  • Improved Noise Immunity
  • Improved Feed-Forward Line Regulation
  • Leading Edge Modulation
  • 150-μA Typical Start-Up Current
  • Low-Power BiCMOS Operation
  • 12-V to 17-V Operation
  • Frequency Range of 6 kHz to 220 kHz

2 Applications

  • Automotive

3 Description

The UCC2818A-Q1 device provides all the functions necessary for active power factor corrected preregulators. The controller achieves near unity power factor by shaping the ac input line current waveform to correspond to that of the ac input line voltage. Average current mode control maintains stable, low distortion sinusoidal line current.

Designed in Texas Instrument’s BiCMOS process, the UCC2818A-Q1 device offers new features such as lower start-up current, lower power dissipation, overvoltage protection, a shunt UVLO detect circuitry, a leading-edge modulation technique to reduce ripple current in the bulk capacitor and an improved, low-offset (±2 mV) current amplifier to reduce distortion at light load conditions.

The UCC2818A-Q1 PFC controller is directly pin-for-pin compatible with the UCC2818 devices. Only the output stage of UCC2818A-Q1 device has been modified to allow use of a smaller external gate drive resistor values. For some power supply designs where an adequately high enough gate drive resistor can not be used, the UCC2818A-Q1 device offers a more robust output stage at the cost of increasing the internal gate resistances. The gate drive of the UC2818A, however, remains strong at ±1.2 A of peak current capability.

The UCC2818A-Q1 device is intended for applications with a fixed supply (VCC). It is available in the 16-pin D package.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
UCC2818A-Q1 SOIC (16) 9.90 mm × 3.91 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Block Diagram

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