This is a complete narrow band digital beam former system that takes advantage of altitude variations by removing co-channel (same frequency) interference. The system consists of the Tuner from WinRadio ( not included ) and the digital beam forming part. TI's C64xx series coupled with FPGA is at the core of the processing power. Multiple DSPs can be stacked together to add to performance and bandwidth. DSP8080-AIMM developed with help of our strategic partner SPAWAR, works with many brands of radio tuners but the first version was tested with WinRadio WR526 coherent tuner.
Application(s)
Military
DSP Generation(s) Supported
TMS320C6414T/15T/16T DSPs
Solution Benefits
- TI's DSP and FPGA scalability for higher performance and bandwidth
- compatibility with many brands of radio tuners
- USB2 and GiGe host interface availability
Functional Description (Supported Functionality)
- Interference mitigation in a co-channel environment
- Implements an adaptive beam forming algorithm
- Frequency range of RF spectrum freely configurable
- Channelizes up to 1000 25KHz-wide frequency slots
- Multi-channel phase-coherent locked system (8-channel)
- Demodulates and listens to spatially combined beam formed signals
- Stares at 22.5 MHz real-time bandwidth
- Supports various channel spacing sizes from 25 kHz to 22.5 MHz wide
- Scalable, hybrid DSP/FPGA processing architecture
- Unique Frequency-Space-Time GUI to pick out target signals
Component Selection
N/A
Hardware Specifications
- Channelizes up to 1000 25KHz-wide frequency slots
- Input frequency range: 30 to 3000 MHz (via WinRadio WR526 tuner)
- Stares at 22.5 MHz real-time bandwidth
- channel spacing sizes from 25 kHz to 22.5 MHz wide
Trade-off Analysis
N/A
Software Functional Description & Performance
N/A
Sources for Software Components
N/A
Tools & Software
Development Tools
PARS is a new technology for generating parallel applications that target hardware systems comprising multiple DSP and FPGAs from a single Simulink model. There are many software packages in the market that target a single DSP or FPGA from a Simulink model but so far none of them supports multiple DSPs and FPGAs and could generate a single application image.
PARS compiles, links and then configures the various generated tasks to build a single application file.
Nory
Nakhaee
Sundance Digital Signal Processing Inc.
4790 Caughlin Pkwy #233
Reno
, Nevada
United States
1-775-8273103
-- http://www.sundancedsp.com
sales@sundancedsp.com
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