With the Pyramid design system, Texas Instruments has developed a hierarchical, script-driven approach to building the high-speed multi-million gate ASIC designs that are commonplace in today's ASIC environment.

The hierarchical, modular architecture of Pyramid enables rapid, efficient adoption of industry-standard EDA (Electronic Design Automation) tools and fresh approaches to the shifting requirements of the ASIC marketplace. Power users can fine-tune the development process within the flow to fit their unique requirements.

The hierarchical model also enables a parallel approach to design. Each block of a design can be developed concurrently, which reduces chip cycle times to manageable levels. The script-driven approach provides the ability to fine-tune processes according to current requirements or to establish customized branches in the flow to address major deviations in how the overall flow is accomplished. The scripts are linked through a UNIX Makefile so that parts of the design flow can be run in batch mode, eliminating some tiresome, repetitive tasks.

Pyramid's hierarchical approach makes better use of resources and distributed processing power.

Pyramid enables:

• Reduced cycle time
• Reduced number of tapeout repetitions
• Increased data-exchange flexibility between business units

This increase in power and flexibility requires the designer to assume more responsibility for the integrity of a design. Designers must be attentive to decisions or choices they make within the flow.

The Pyramid design flow supports:

• Large designs (10-50 million gates)
• High-speed designs (500 MHz to 1GHz)
• Fast, simple integration of industry-standard tools
• Competitive development cycle time

Another attribute of Pyramid is the ability to divide a flat database representation into tiles, which can be processed in parallel. Again, the modular approach translates into faster cycle times for the chip-creation process.