TI honored as part of Cisco Systems 'Supplier of Year' awards
Texas Instruments ASIC Solutions Positively Impact Cisco Customer Satisfaction
Cisco Systems Inc. has awarded TI with two "Supplier of the Year" awards the technology and semiconductor categories. TI was selected because of its ability to deliver ASIC solutions that exceed expectations in areas including flexibility, responsiveness, technology, value, quality, service and support.

Designing for process variation at 130 nm
EETimes (September 8, 2003)
Managing the process variation in today's shrinking technology nodes is becoming critical to achieve first-pass success.

Texas Instruments and Calix Success Story
Texas Instruments Develops ASIC Solution to Support Calix's C7™ Simplified Services Platform SERDES Backplane
Synergy between innovative telecom start-up and leading silicon vendor results in revolutionary platform designed to handle access services and transport in a single high-density, economical enclosure.

Infrastructure ASICs drive high-performance memory decisions
EETimes (May 1, 2003)
Memory challenges in the 130-nm process node are driving ASIC providers in new directions.

Texas Instruments Teams with Silicon Logic Engineering to Strengthen ASIC Offering
Companies to Jointly Develop Complex ASICs for High-end Electronics Markets
DALLAS, Texas and EAU CLAIRE, Wis., January 20, 2003 -- Texas Instruments Incorporated (NYSE:TXN) (TI) and Silicon Logic Engineering Inc. (SLE), today announced an agreement to jointly develop complex application specific integrated circuits (ASICs) for TI customers in the wireless and wireline infrastructure, and high performance computing markets.

Taking on the 130nm node and beyond
EETimes (January 13, 2003)
Leveraging all of the performance and density available at this node and beyond presents all of the predicted challenges and more - signal integrity, power distribution, the design productivity gap. Using a flow based on third-party EDA tools supplemented strategically by proprietary solutions TI has succeeded in tackling these challenges. This article will discuss the practical difficulties encountered in implementing these designs and tactical and strategic solutions. Included will be a discussion of how decisions made in defining the library offering affect the design process, the use of hierarchical design techniques, the interaction between the physical footprint of memories and hard macros and design route-ability and density.

Texas Instruments Finds Opportunity In Building Big, Fast ASICs
Multi-Million Gate, High-Speed Devices Becoming a TI Specialty
DALLAS (November 25, 2002) -- Texas Instruments (NYSE: TXN) (TI) announced its application specific integrated circuit (ASIC) team is targeting the largest and most complex products by leveraging TI's advanced semiconductor process technology, embedded intellectual property (IP), advanced packaging and design tools. The latest example, sampling with the customer today, is a 20 million gate equivalent ASIC operating at 312 MHz and containing close to 1000 signal lines. Large, high performance ASICs require a hands-on design partner like TI to successfully manufacture the chips in advanced process geometries of 130nm and below.