CDCL6010 as a Frequency Synthesizer and Jitter Cleaner
This application report provides general guidelines for using the TI 1.8V LVDS/LVCMOS clock receiver CDCL6010 as a frequency synthesizer and/or jitter cleaner. This report reviews the basic device functionality and most efficient methods of use.
The document also includes a detailed discussion of generating multiple frequencies with a common input frequency as well as a practical example of this technique. The report concludes with a brief description of recommendations on line terminations and power supply decoupling.
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