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Parallel 2-D FFT Implementation With TMS320C4x DSPs (Rev. A)

This document provides a brief review of the fast Fourier transform (FFT) algorithm and its extension to two dimensions, then focuses on parallel implementations of 2-D FFTs. It presents a TMS320C40 32-bit parallel digital signal processor (DSP) implementation of parallel 2-D FFT using the TMS320C40 development tool (PPDS). The appendices provide the C and TMS320C40 assembler source code for performing serial and parallel 2-D FFTs.



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