TMS320C672x DSP Software-Programmable Phase-Locked Loop (PLL) Controller RG (Rev. A)
This document describes the operation of the software-programmable phase-locked loop (PLL) controller in the TMS320C672x digital signal processors (DSPs) of the TMS320C6000 DSP family. The PLL controller offers flexibility and convenience by way of software-configurable multiplier and dividers to modify the input signal internally. The resulting clock outputs are passed to the C672x DSP core, peripherals, and other modules inside the C672x DSP.
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