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TMS320C6457 DSP Software-Programmable Phase-Locked Loop (PLL) Controller UG

This document describes the operation of the software-programmable phase-locked loop (PLL) controller in the TMS320C6457 digital signal processors (DSPs). The PLL controller offers flexibility and convenience by way of software-configurable multipliers and dividers to modify the input signal internally. The resulting clock outputs are passed to the C6457 DSP core, peripherals, and other modules inside the C6457 DSP.

TMS320C6457 DSP Software-Programmable Phase-Locked Loop (PLL) Controller UG (PDF 191 KB) 108 views
11 Mar 2008