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The OMAP1710 processor is a single-chip applications
processor that supports all cellular standards, and complements any modem or
chipset and any air interface. It is intended for high-volume wireless handset
manufacturers and is not available through distributors.
First multimedia applications processor using TI’s advanced
90 nanometer (nm) process technology
The OMAP1710 device offers up to 40 percent improvement in performance for
a variety of mobile applications, while consuming as little as half the power
of current TI application processors. The OMAP1710 processor leverages the same
software environment as all OMAP chips, enabling application developers and
cell phone designers to completely reuse and build upon existing software.
OMAP multi-engine architecture
Built on TI’s industry-proven OMAP multi-engine architecture, the OMAP1710
processor is designed to handle a variety of application tasks in parallel,
so a user can enjoy several features and services concurrently. This unique
multi-engine approach ensures an active multimedia application will not be interrupted
or degraded when a separate application, such as an operating system control
task, is launched or running simultaneously.
Additional enhancements include:
- Superior software flexibility
- Improved multimedia and graphics performance
- Integrated hardware and software security features
- High-performance camera interface
- Enhanced peripherals
- Ultra-low standby power consumption
The OMAP1710 processor engines include an ARM™ processor, a TI DSP engine,
as well as a range of software and hardware accelerators for video encode and
decode, still picture compression, Java™ and security. TI’s unique
advanced security hardware provides a secure execution environment that enables
TI’s customers to deliver more secure wireless devices required mobile
operators. TI’s security hardware also offers an ideal platform to address
the security threats faced by phone manufacturers and carriers today such as
preventing the loading of unauthorized software and protecting sensitive data
such as the phone’s identity.
Optimized for Wireless Handsets
The OMAP1710 processor is optimized to be paired with TI’s TCS
wireless chipsets for GSM/GPRS/EDGE/UMTS. The OMAP1710
device is software compatible with previous OMAP applications processors, offering
easy migration for applications developers and handset manufacturers and optimal
software flexibility and performance with support for advanced mobile operating
systems: Linux®, Microsoft’s Windows Mobile™, Nucleus, PalmOS®
and Symbian OS.
Robust Ecosystem
Like all of TI’s current OMAP processors, the OMAP1710 is supported by
the OMAP
Developer Network of leading wireless software application developers and
the network of independent OMAP
Technology Centers providing development support services. The new OMAP1710
processor ensures OMAP developers easy access to open programming interfaces
and development tools to take full advantage of OMAP processor performance.
OMAP1710 Features:
Advanced 90 nanometer CMOS Technology
- Low-voltage 90 nm technology
- 1.05 - 1.3V cores; 1.8V I/O
- Consumes less than 10 µA in standby mode
- Split power supplies for application processing, digital baseband and real-time
clock enable precise control over power consumption
- Optimized clocking and power management: only two clocks required at 13
MHz and 32 kHz
TMS320C55x DSP core subsystem
- Up to 220 MHz (maximum frequency)
- 32K x 16-bit on-chip dual-access RAM (DARAM) (64 KB)
- 48K x 16-bit on-chip single-access RAM (SARAM) (96 KB)
- 24 KB I-cache
- One/two instructions executed per cycle
- Video hardware accelerators for DCT, iDCT, pixel interpolation, and motion
estimation for video compression
ARM926TEJ core subsystem
- Up to 220 MHz ARM926TEJ V5 architecture (maximum frequency)
- 32KB I-cache; 16KB D-cache
- Java acceleration
- Support for 32-bit and 16-bit (thumb mode) instruction sets
- Data and program MMUs
- Two 64-entry translation look-aside buffers (TLBs) for MMUs
- 17-word write buffer
Security Acceleration in Hardware
- Secure bootloader
- 48 kB of secure ROM
- 16 kB of secure RAM
- Hardware acceleration for security standards and random number generator
- Unique die ID cell
- Third-party Security software library
Memory Traffic Controller (TC)
- 16-bit EMIFS external memory interface
- 16-bit EMIFF external memory interface
Application Subsystem
- Supports leading operating systems
- DMA with 4 physical and 17 logical channels and a dedicated 2D graphics
engine
- USB On-the-Go (OTG)
- Two SD/MMC/SDIO ports
- Two high-speed 3.68 MHz UARTs
- I2C controller
- Two high-speed 3.68 MHz UARTs
- uWire
- CompactFlash
- Parallel and compact camera ports
- Enhanced Debug Trace (ETM) for debug
- Fast IrDA (FIR)
- SPI
- LCD controller
- Comprehensive memory controller for interfaces to:
- 128 MB of mobile SDRAM and mobile DDR
- 256 MB Flash (for burst, programmable NOR flash)
289-ball, 12 mm x 12 mm MicroStar BGA™ Package
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