Silk To Solder Mask (Clearance=3mil) (IsPad),(All) |
Silk To Solder Mask Clearance Constraint: (1.262mil < 3mil) Between Arc (2532.666mil,2653.276mil) on Top Overlay And Pad C168-2(2518.305mil,2631.895mil) on L1 TOP [Top Overlay] to [Top Solder] clearance [1.262mil] Waived by at 8/29/2018 3:45:18 AM Component outline can be ignored |
Silk To Solder Mask Clearance Constraint: (2.843mil < 3mil) Between Pad C100-1(5534.172mil,809.766mil) on L1 TOP And Track (5513.537mil,791.422mil)(5553.537mil,791.422mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [2.843mil] Waived by at 8/29/2018 3:45:18 AM Component outline can be ignored |
Silk To Solder Mask Clearance Constraint: (2.843mil < 3mil) Between Pad C105-1(5374.353mil,809.766mil) on L1 TOP And Track (5354.989mil,791.422mil)(5394.989mil,791.422mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [2.843mil] Waived by at 8/29/2018 3:45:18 AM Component outline can be ignored |
Silk To Solder Mask Clearance Constraint: (2.843mil < 3mil) Between Pad C112-1(5534.172mil,1140.447mil) on L1 TOP And Track (5513.537mil,1158.79mil)(5553.537mil,1158.79mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [2.843mil] Waived by at 8/29/2018 3:45:18 AM Component outline can be ignored |
Silk To Solder Mask Clearance Constraint: (2.843mil < 3mil) Between Pad C117-1(5374.353mil,1140.447mil) on L1 TOP And Track (5354.989mil,1158.79mil)(5394.989mil,1158.79mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [2.843mil] Waived by at 8/29/2018 3:45:18 AM Component outline can be ignored |
Silk To Solder Mask Clearance Constraint: (1.416mil < 3mil) Between Pad C121-2(5050.257mil,956.888mil) on L8 BOTTOM And Track (5033.803mil,940.065mil)(5056.803mil,940.065mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [1.416mil] Waived by at 8/29/2018 3:45:18 AM Component outline can be ignored |
Silk To Solder Mask Clearance Constraint: (2.843mil < 3mil) Between Pad C42-1(663.448mil,1597.621mil) on L1 TOP And Track (642.812mil,1579.278mil)(682.812mil,1579.278mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [2.843mil] Waived by at 8/29/2018 3:45:18 AM Component outline can be ignored |
Silk To Solder Mask Clearance Constraint: (2.843mil < 3mil) Between Pad C47-1(503.628mil,1597.621mil) on L1 TOP And Track (484.264mil,1579.278mil)(524.264mil,1579.278mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [2.843mil] Waived by at 8/29/2018 3:45:18 AM Component outline can be ignored |
Silk To Solder Mask Clearance Constraint: (2.843mil < 3mil) Between Pad C54-1(663.448mil,1928.302mil) on L1 TOP And Track (642.812mil,1946.646mil)(682.812mil,1946.646mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [2.843mil] Waived by at 8/29/2018 3:45:18 AM Component outline can be ignored |
Silk To Solder Mask Clearance Constraint: (2.843mil < 3mil) Between Pad C59-1(503.628mil,1928.302mil) on L1 TOP And Track (484.264mil,1946.646mil)(524.264mil,1946.646mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [2.843mil] Waived by at 8/29/2018 3:45:18 AM Component outline can be ignored |
Silk To Solder Mask Clearance Constraint: (2.081mil < 3mil) Between Pad R44-1(185.281mil,1783.208mil) on L8 BOTTOM And Track (167.187mil,1806.288mil)(190.187mil,1806.288mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [2.081mil] Waived by at 8/29/2018 3:45:18 AM Component outline can be ignored |
Silk To Solder Mask Clearance Constraint: (2.081mil < 3mil) Between Pad R44-2(245.281mil,1783.208mil) on L8 BOTTOM And Track (240.187mil,1806.288mil)(263.187mil,1806.288mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [2.081mil] Waived by at 8/29/2018 3:45:18 AM Component outline can be ignored |
Silk To Solder Mask Clearance Constraint: (2.081mil < 3mil) Between Pad R68-1(5056.005mil,1000.352mil) on L8 BOTTOM And Track (5037.911mil,1023.433mil)(5060.911mil,1023.433mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [2.081mil] Waived by at 8/29/2018 3:45:18 AM Component outline can be ignored |
Silk To Solder Mask Clearance Constraint: (2.081mil < 3mil) Between Pad R68-2(5116.005mil,1000.352mil) on L8 BOTTOM And Track (5110.911mil,1023.433mil)(5133.911mil,1023.433mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [2.081mil] Waived by at 8/29/2018 3:45:18 AM Component outline can be ignored |
Silk To Solder Mask Clearance Constraint: (0.956mil < 3mil) Between Pad U10-4(4118.78mil,3096.82mil) on L8 BOTTOM And Track (4076.965mil,3114.207mil)(4117.965mil,3114.207mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.956mil] Waived by at 8/29/2018 3:45:18 AM Component outline can be ignored |
Silk To Solder Mask Clearance Constraint: (2.567mil < 3mil) Between Pad U10-4(4118.78mil,3096.82mil) on L8 BOTTOM And Track (4117.965mil,3114.207mil)(4117.965mil,3137.207mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [2.567mil] Waived by at 8/29/2018 3:45:18 AM Component outline can be ignored |
Silk To Solder Mask Clearance Constraint: (2.568mil < 3mil) Between Pad U10-4(4118.78mil,3096.82mil) on L8 BOTTOM And Track (4117.965mil,3114.207mil)(4117.965mil,3137.207mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [2.568mil] Waived by at 8/29/2018 3:45:18 AM Component outline can be ignored |
Silk To Solder Mask Clearance Constraint: (2.567mil < 3mil) Between Pad U10-4(4118.78mil,3096.82mil) on L8 BOTTOM And Track (4117.965mil,3114.207mil)(4158.965mil,3114.207mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [2.567mil] Waived by at 8/29/2018 3:45:18 AM Component outline can be ignored |
Silk To Solder Mask Clearance Constraint: (0.956mil < 3mil) Between Pad U10-5(4138.465mil,3096.82mil) on L8 BOTTOM And Track (4117.965mil,3114.207mil)(4158.965mil,3114.207mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.956mil] Waived by at 8/29/2018 3:45:18 AM Component outline can be ignored |
Silk To Solder Mask Clearance Constraint: (0.956mil < 3mil) Between Pad U10-6(4158.15mil,3096.82mil) on L8 BOTTOM And Track (4117.965mil,3114.207mil)(4158.965mil,3114.207mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.956mil] Waived by at 8/29/2018 3:45:18 AM Component outline can be ignored |
Silk To Solder Mask Clearance Constraint: (2.853mil < 3mil) Between Pad U10-6(4158.15mil,3096.82mil) on L8 BOTTOM And Track (4158.965mil,3114.207mil)(4158.965mil,3137.207mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [2.853mil] Waived by at 8/29/2018 3:45:18 AM Component outline can be ignored |
Silk To Solder Mask Clearance Constraint: (2.853mil < 3mil) Between Pad U10-6(4158.15mil,3096.82mil) on L8 BOTTOM And Track (4158.965mil,3114.207mil)(4158.965mil,3137.207mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [2.853mil] Waived by at 8/29/2018 3:45:18 AM Component outline can be ignored |
Silk To Solder Mask Clearance Constraint: (2.853mil < 3mil) Between Pad U10-6(4158.15mil,3096.82mil) on L8 BOTTOM And Track (4158.965mil,3114.207mil)(4199.965mil,3114.207mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [2.853mil] Waived by at 8/29/2018 3:45:18 AM Component outline can be ignored |