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Mixed Single and Differential Ended

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  • CDCM1802/CDCM1804 (scaa073.HTM, 8 KB)
    04 Aug 2004 Abstract
 

You've Selected: Mixed Single and Differential Ended
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3 Results    

Part Number  Status  VCC (V)  No. of Outputs  Output Drive (mA)  Vcc range (V)  Frequency (max) (MHz)  Input Level  tsk(o) (ns)  tsk(p) (ns)  Output Level  3.3V Vcc / Vdd  Pin/Package  Approx. Price (US$)  
Description  
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CDCE18005ACTIVE  3.3  10  
5  		    1500  LVCMOS  
LVDS  
LVPECL  		0.075    LVCMOS  
LVDS  
LVPECL  		Yes  48QFN6.00 | 1ku  5/10 Outputs Clock Buffer with Divider  
CDCM1802ACTIVE  3.3  2  14  2.5 and 3.3  800  LVDS  
LVPECL  
LVTTL  		    LVCMOS  
LVPECL  		  16QFN4.70 | 1ku  Clock Buffer w/Programmable Divider, LVPECL I/O + addl LVCMOS output  
CDCM1804ACTIVE  3.3  4    3-3.6  800  CML  
HSTL  
LVDS  
LVPECL  
SSTL-2  
VML  		30  150  1-LVCMOS No of outputs = 3 LVPECL  
LVCMOS  
LVPECL  		Yes  24QFN
24VQFN		5.90 | 1ku  1:3 LVPECL Clock Buffer & Addl LVCMOS Output & Programmable Divider  
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3 Results