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PLL Buffers

TI analog PLL Buffers Clocks and Timers products are a subset of analog Clock Distribution solutions. This page is your resource to download datasheets, application notes, order samples and use parametric search to research other Clocks and Timers-related analog solutions.

Application Notes   

  • DDR2 Memory Interface Clocks and Registers - Overview (scaa101.HTM, 8 KB)
    25 Mar 2009 Abstract
  • Application Examples for CDCUx877x PLL family (scaa087.HTM, 8 KB)
    07 May 2008 Abstract
 

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Input Level No. of Outputs Temp Range (C) Operating Temp Range (Celsius) Operating Frequency Range (min) (MHz) Operating Frequency Range (max) (MHz) Divider Ratio Output Drive (mA) Static Current (mA) Output Level
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Part Number  Status  
Sub Family  		Input Level  No. of Outputs  Temp Range (C)  Jitter-Peak to Peak(P-P) or Cycle to Cycle(C-C)  Operating Frequency Range (min) (MHz)  Operating Frequency Range (max) (MHz)  Output Level  Divider Ratio  Output Drive (mA)  Static Current (mA)  VCC (V)  Buffer/Driver  3.3V Vcc / Vdd  Multiplier/Divider  Spread Spectrum Clocking (SSC)  Pin/Package  Approx. Price (US$)  
Description  
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CDC857-2ACTIVE  Differential Ended  LVTTL  
SSTL-2  		10      66  167  SSTL-2        3.3/2.5  Yes      Yes  48TSSOP8.30 | 1ku  Phase-Lock Loop Clock Drivers  
CDCU2A877ACTIVE  Differential Ended  SSTL-18  10      125  410  SSTL-18    18  0.5  1.8  Yes      Yes  52BGA MICROSTAR JUNIOR3.05 | 1ku  1.8V Phase-Lock Loop Clock Driver with high output drive for DDR2 SDRAM Applications  
CDCU877ACTIVE  Differential Ended  SSTL-18  10      10  400  SSTL-18    9  0.5  1.8  Yes      Yes  40QFN
52BGA MICROSTAR JUNIOR		3.05 | 1ku  1.8V Phase-Lock Loop Clock Driver for DDR2 SDRAM Applications  
CDCU877AACTIVE  Differential Ended  SSTL-18  10      10  400  SSTL-18    9  0.5  1.8  Yes      Yes  40QFN
52BGA MICROSTAR JUNIOR		3.05 | 1ku  1.8V Phase-Lock Loop Clock Driver for DDR2 SDRAM Applications  
CDCU877BACTIVE  Differential Ended  SSTL-18  10      10  340  SSTL-18    9  0.5  1.8          52BGA MICROSTAR JUNIOR3.05 | 1ku  1.8V Phase-Lock Loop Clock Driver for DDR2 SDRAM Applications  
CDCUA877ACTIVE  Differential Ended  SSTL-18  10      125  410  SSTL-18    9  0.5  1.8  Yes      Yes  52BGA MICROSTAR JUNIOR3.35 | 1ku  1.8V Phase-Lock Loop Clock Driver for DDR2 SDRAM Applications  
CDCV850ACTIVE  Differential Ended  LVTTL  
SSTL-2  		10      60  140  SSTL-2        2.5  Yes      Yes  48TSSOP2.05 | 1ku  2.5V Phase Lock Loop Differential Clock Driver with 2-Line Serial Interface  
CDCV855ACTIVE  Differential Ended  SSTL-2  4      60  180  SSTL-2        2.5  Yes      Yes  28TSSOP1.15 | 1ku  1:4 DDR PLL Clock Driver  
CDCV857ACTIVE  Differential Ended  LVTTL  
SSTL-2  		10      60  200  SSTL-2        2.5  Yes      Yes  48TSSOP3.90 | 1ku  1:10 DDR Phase-Lock Loop Clock Driver  
CDCV857AACTIVE  Differential Ended  SSTL-2  10      60  180  SSTL-2        2.5  Yes      Yes  48TSSOP
56BGA MICROSTAR JUNIOR		2.90 | 1ku  2.5V SSTL-II Phase Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications  
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