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Miscellaneous Gate and Delay Elements

Application Notes   

  • Whisker Evaluation of Pb-Free Component Leads (Rev. B) (szza051b.HTM, 10 KB)
    30 Aug 2005 Abstract
  • Semiconductor Packing Methodology (Rev. C) (szza021c.HTM, 8 KB)
    15 Aug 2005 Abstract

4 Results    

Part Number  Status  Input Level  No. of Gates  Output Drive (mA)  Vcc range (V)  Static Current  Voltage Nodes (V)  Output Level  Technology Family  5V Supply Voltage  Very Low Power Consumption  Pin/Package  Approx. Price (US$)  
Description  
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CD4007UBACTIVE        -0.5 to 20    5, 10, 15  5,10,15  CD4000      14PDIP
14SO
14SOIC
14TSSOP		0.22 | 1ku  CMOS Dual Complementary Pair Plus Inverter  
CD4007UB-MIL ACTIVE        -0.5 to 20    5, 10, 15  5,10,15  CD4000      14CDIP3.90 | 1ku  CMOS Dual Complementary Pair Plus Inverter  
CD4572UBACTIVE            5, 10, 15    CD4000      16PDIP
16SO
16SOIC
16TSSOP		0.62 | 1ku  CMOS Hex Gate (with 4 Inverters, One 2-Input NOR Gate, and One 2-Input NAND Gate)  
SN74LS31ACTIVE  TTL  6  -0.4/8  4.75 to 5.25  12  5  TTL  LS  Yes  Yes  16PDIP
16SO
16SOIC		0.62 | 1ku  Hex Delay Elements for Generating Delay Lines  
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4 Results